參數(shù)資料
型號(hào)： MC13180
廠商： MOTOROLA INC
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： 2.4 GHz Low Power Wireless Transceiver IC for Bluetooth⑩ Applications
中文描述： SPECIALTY TELECOM CIRCUIT, PQCC48
封裝： PLASTIC, QFN-48
文件頁(yè)數(shù)： 27/58頁(yè)
文件大小： 992K
代理商： MC13180
Functional Description
MOTOROLA
MC13180
Product Preview
27
4.16 Receive Data Path
The MC13180 is placed into the receive mode from the idle mode by asserting the RTXEN pin after
setting the Receive Enable bit (R2/13), clearing the Transmit Enable bit (R2/14), and clearing the Narrow
Bandwidth Enable bit (R2/12) (See Figure 12). The RFDATA pin of the device is configured as an output
as soon as these bit conditions are loaded into the register map. The baseband interface signals used in the
receive mode are shown in Table 14. The interface signal levels are internally translated to/from V
DDINT
to
V
DD
.
To initiate a receive cycle, the user will set the local oscillator frequency of the device in conjunction with
the High/Low Injection Enable bit. Optionally, other address map values may be written or read. During
this “SPI” cycle, the device's RTXEN must be de
-
asserted.
After time T
SUSPI
, the RTXEN pin can be asserted. This initiates a sequence internal to the MC13180
which places it into the receive mode. Serialized, A/D data will appear at the RFDATA pin, framed by the
FS pin, after T
propFS
.
The data represents a 6
-
Bit, 2’s
-
complement digital value and is sampled four times for every data bit.
Once the receive cycle is complete, the RTXEN pin is de
-
asserted and the MC13180 begins an internal
power down sequence.
4.17 Transmit Data Path
The MC13180 is placed into the transmit mode from the idle mode by setting the Transmit Enable bit (R2/
14), setting the Narrow Bandwidth Enable bit (R2/12), and clearing the Receive Enable bit (R2/13) of the
address map, then asserting the RTXEN pin of the device (see Figure 12). The RFDATA pin of the device
is configured as an input as soon as these bit conditions are loaded into the register map. The baseband
interface signals used in the transmit mode are shown in Table 14. The interface signal levels are internally
translated to/from V
DDINT
to V
DD
.
To initiate a transmit cycle, the user will normally set the desired channel frequency and mode bits
mentioned above. Optionally, other address map values may be written or read. During this “SPI” cycle,
the device's RTXEN must be de
-
asserted, ensuring that the device remains in idle mode.
After time T
SUSPI
, the RTXEN pin can be asserted. This initiates a sequence internal to the MC13180
which places it into the transmit mode. Data to be transmitted must be set and stable no later than T
stb
after
the assertion of RTXEN. The RF data will be present at the PA output after RTXEN time, T
X
LAT.
Subsequent serial data can then continue to be presented to the MC13180 via the RFDATA pin, and the
CLK of the device (divided by 24) can be used as the system clock to synchronize the data transfer.
Once the data stream has been transmitted and the time T
hold
is met, the RTXEN pin is de
-
asserted and the
MC13180 begins an internal power down sequence. Since RF power is still present at the PA output, no
SPI operations or additional cycles can be performed for at least T
TXDIS
μ
s. At this time, RF power is at a
substantially low enough level as to not produce undesired emissions.
4.18 Transmit Synchronization Delay
A programmable delay exists between the rising edge of RTXEN and the first available bit of data. This
delay range is TXsync and is set via SPI bits of Transmit Synchronization Time Delay Value (R8/15
-
8)
where the value represents the delay in microseconds. Packet data is seen at the antenna approximately 2.5
μ
s after this delay. Refer to Figure 12 for the corresponding timing diagram. All Bluetooth packets require
a minimum of four preamble bits of pattern 0101 or 1010. For minimum power consumption, set the delay
to TXsync minimum. If additional settling time or preamble bits are required, manipulate the delay as
necessary, up to TXsync maximum.
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