參數(shù)資料
型號(hào)： MC34982PNA
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Single Intelligent High-Current Self-Protected Silicon High-Side Switch (2.0 mOhm)(單智能大電流帶自保護(hù)功能的硅高端開關(guān)（2mOhm）)
中文描述： 單智能大電流的自我保護(hù)硅高邊開關(guān)（2.0毫歐）（單智能大電流帶自保護(hù)功能的硅高端開關(guān)（2mOhm））
文件頁(yè)數(shù)： 9/24頁(yè)
文件大小： 771K
代理商： MC34982PNA
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33982
9
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 4.5 V
≤
V
DD
≤
5.5 V, 6.0 V
≤
V
PWR
≤
27 V, -40
°
C
≤
T
J
≤
150
°
C unless otherwise noted.
Typical values noted reflect the approximate parameter mean at T
A
= 25
°
C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
CONTROL INTERFACE
Input Logic High Voltage (Note 13)
V
IH
0.7V
DD
–
–
V
Input Logic Low Voltage (Note 13)
V
IL
–
–
0.2V
DD
V
Input Logic Voltage Hysteresis (Note 14)
V
IN(HYS)
100
350
750
mV
Input Logic Pull-Down Current (SCLK, IN, SI)
I
DWN
5.0
–
20
μ
A
RST
Input Voltage Range
V
RST
4.5
5.0
5.5
V
SO,
FS
Tri-State Capacitance (Note 15)
C
SO
–
–
20
pF
Input Logic Pull-Down Resistor (
RST
) and WAKE
I
DWN
100
200
400
k
Input Capacitance (Note 15)
C
IN
–
4.0
12
pF
WAKE Input Clamp Voltage (Note 16)
I
CL(WAKE)
< 2.5 mA
V
CL(WAKE)
7.0
–
14
V
WAKE Input Forward Voltage
I
CL(WAKE)
= -2.5 mA
V
F(WAKE)
-2.0
–
-0.3
V
SO High-State Output Voltage
I
OH
= 1.0 mA
V
SOH
0.8V
DD
–
–
V
FS
, SO Low-State Output Voltage
I
OL
= -1.6 mA
V
SOL
–
0.2
0.4
V
SO Tri-State Leakage Current
CS
> 0.7V
DD
I
SO(LEAK)
-5.0
0
5.0
μ
A
Input Logic Pull-Up Current (Note 17)
CS
, V
IN
> 0.7V
DD
I
UP
5.0
–
20
μ
A
FSI Input Pin External Pull-Down Resistance
FSI Disabled, HS Indeterminate
FSI Enabled, HS OFF
FSI Enabled, HS ON
RFS
RFSdis
RFSoff
RFSon
–
6.0
30
0
10
–
1.0
14
–
k
Notes
13.
Upper and lower logic threshold voltage range applies to SI,
CS
, SCLK,
RST
, IN, and WAKE input signals. The WAKE and
RST
signals may
be supplied by a derived voltage reference to V
PWR
.
Parameter is guaranteed by process monitoring but is not production tested.
Input capacitance of SI,
CS
, SCLK,
RST
, and WAKE. This parameter is guaranteed by process monitoring but is not production tested.
The current must be limited by a series resistance when using voltages > 7.0 V.
Pull-up current is with
CS
OPEN.
CS
has an active internal pull-up to V
DD
.
14.
15.
16.
17.
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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