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參數(shù)資料
| 型號(hào)： | MC68HC05L1FU |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | QFP-64 |
| 文件頁(yè)數(shù)： | 29/102頁(yè) |
| 文件大?。?/td> | 632K |
| 代理商： | MC68HC05L1FU |
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MOTOROLA
4-4
MC68HC05L1
RESETS AND INTERRUPTS
4
4.2.1
Hardware Controlled Sequences
The following three functions are not strictly interrupts, however, they are tied very closely to the
interrupts. These functions are RESET, STOP, WAIT.
1) RESET
The RESET input pin causes the program to go to its starting
address. This address is specied by the contents of memory
locations $1FFE and $1FFF. The interrupt mask of the condition
code register is also set. Most parts of the MCU is congured to
some known state as described in Table 4-1.
2) STOP
The STOP instruction causes the oscillator to be turned off and
the processor “sleeps” until an external interrupt (IRQ) or RESET
occurs. See section 9 on Low Power Modes.
3) WAIT
The WAIT instruction causes all processor clocks to stop, but
leaves the Timer running. This “rest” state of the processor can
be exited by RESET, an external interrupt (IRQ), or any Timer
interrupts. There are no special wait vectors for these individual
interrupts. See section 9 on Low Power Modes.
4.2.2
Software Interrupt (SWI)
The software interrupt is an executable instruction. The action of the SWI instruction is similar to
the hardware interrupts. The SWI is executed regardless of the state of the interrupt mask in the
condition code register. The service routine address is specied by the contents of memory
location $1FFC and $1FFD.
Table 4-2 Reset/Interrupt Vector Addresses
Register
Flag Name
Interrupt
CPU Interrupt
Vector Address
–
Reset
RESET
$1FFE-$1FFF
–
Software
SWI
$1FFC-$1FFD
–
External Interrupt
IRQ
$1FFA-$1FFB
Timer Status
ICF
Input Capture
TIMIC
$1FF8-$1FF9
OCF
Output Compare
TIMOC
$1FF6-$1FF7
TOF
Timer Overow
TIMOV
$1FF4-$1FF5
TPG
30
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