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參數(shù)資料
| 型號： | MC68HC05LJ5P |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 32/85頁 |
| 文件大?。?/td> | 899K |
| 代理商： | MC68HC05LJ5P |
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GENERAL RELEASE SPECIFICATION
November 10, 1998
MOTOROLA
LOW POWER MODES
MC68HC05LJ5
6-4
REV 1
The contents of RAM and CPU registers are retained at supply voltages as low as
2.0 VDC. This is called the data-retention mode where the data is held, but the
device is not guaranteed to operate. The RESET pin must be held low during
data-retention mode.
6.4
COP WATCHDOG TIMER CONSIDERATIONS
The COP Watchdog Timer is active in all modes of operation if enabled by a mask
option. However, regardless of the mask option chosen, the COP Watchdog Timer
will be disabled if the voltage on the IRQ pin equals or exceeds the VTST voltage
level. Thus, emulation of applications that do not service the COP should only be
done with devices that have the COP Mask Option disabled. This prevents the
voltage level on the IRQ pin from enabling the COP which would cause a reset
and possibly change the operating mode of the device.
If the COP Watchdog Timer is selected by the mask option, any execution of the
STOP instruction (either intentional or inadvertent due to the CPU being dis-
turbed) will cause the oscillator to halt and prevent the COP Watchdog Timer from
timing out unless the STOP to HALT conversion feature is enabled. Therefore, it is
recommended that the STOP instruction should be converted to a HALT instruc-
tion if the COP Watchdog Timer is enabled.
If the COP Watchdog Timer is selected by the mask option, the COP will reset the
MCU when it times out. Therefore, it is recommended that the COP Watchdog
should be disabled for a system that must have intentional uses of the WAIT Mode
for periods longer than the COP time-out period.
The recommended interactions and considerations for the COP Watchdog Timer,
STOP instruction, and WAIT instruction are summarized in Table 6-1.
Table 6-1. COP Watchdog Timer Recommendations
less than VTST
WAIT Time less than
COP Time-Out
Voltage on IRQ Pin
STOP Instruction
WAIT Time
THEN the
COP Watchdog Timer
should be as follows:
less than VTST
Disable COP
by mask option
converted to HALT
by mask option
Enable or disable COP
by mask option
WAIT Time more than
COP Time-Out
any length
WAIT Time
Acts as STOP
less than VTST
Disable COP
by mask option
converted to HALT
by mask option
IF the following conditions exist:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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