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參數(shù)資料
| 型號(hào)： | MC68HC05LJ5P |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 49/85頁 |
| 文件大?。?/td> | 899K |
| 代理商： | MC68HC05LJ5P |
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November 10, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05LJ5
INSTRUCTION SET
MOTOROLA
REV 1
9-1
SECTION 9
INSTRUCTION SET
This section describes the addressing modes and instruction types.
9.1
ADDRESSING MODES
The CPU uses eight addressing modes for exibility in accessing data. The
addressing modes dene the manner in which the CPU nds the data required to
execute an instruction. The eight addressing modes are the following:
Inherent
Immediate
Direct
Extended
Indexed, No Offset
Indexed, 8-Bit Offset
Indexed, 16-Bit Offset
Relative
9.1.1 Inherent
Inherent instructions are those that have no operand, such as return from interrupt
(RTI) and stop (STOP). Some of the inherent instructions act on data in the CPU
registers, such as set carry ag (SEC) and increment accumulator (INCA).
Inherent instructions require no memory address and are one byte long.
9.1.2 Immediate
Immediate instructions are those that contain a value to be used in an operation
with the value in the accumulator or index register. Immediate instructions require
no memory address and are two bytes long. The opcode is the rst byte, and the
immediate data value is the second byte.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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