參數(shù)資料
型號: MC68HC08LT8
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Microcontrollers
中文描述: 微控制器
文件頁數(shù): 55/156頁
文件大?。?/td> 1030K
代理商: MC68HC08LT8
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
55
Chapter 6
Timer Interface Module (TIM)
6.1 Introduction
This section describes the timer interface (TIM) module. The TIM is a two-channel timer that provides a
timing reference with Input capture, output compare, and pulse-width-modulation functions.
Figure 6-1
is
a block diagram of the TIM.
This particular MCU has two timer interface modules which are denoted as TIM1 and TIM2.
6.2 Features
Features of the TIM include:
Two input capture/output compare channels:
Rising-edge, falling-edge, or any-edge input capture trigger
Set, clear, or toggle output compare action
Buffered and unbuffered pulse-width-modulation (PWM) signal generation
Programmable TIM clock input with 7-frequency internal bus clock prescaler selection
Free-running or modulo up-count operation
Toggle any channel pin on overflow
TIM counter stop and reset bits
6.3 Pin Name Conventions
The text that follows describes both timers, TIM1 and TIM2. The TIM input/output (I/O) pin names are
T[1,2]CH0 (timer channel 0) and T[1,2]CH1 (timer channel 1), where “1” is used to indicate TIM1 and “2”
is used to indicate TIM2. The two TIMs share four I/O pins with four I/O port pins. The full names of the
TIM I/O pins are listed in
Table 6-1
.
The generic pin names appear in the text that follows.
NOTE
References to either timer 1 or timer 2 may be made in the following text by
omitting the timer number. For example, TCH0 may refer generically to
T1CH0 and T2CH0, and TCH1 may refer to T1CH1 and T2CH1.
Table 6-1. Pin Name Conventions
TIM Generic Pin Names:
T[1,2]CH0
T[1,2]CH1
Full TIM
Pin Names:
TIM1
PTB2/T1CH0/PPIECK
PTB3/T1CH1
TIM2
PTB0/T2CH0
PTB1/T2CH1
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