參數(shù)資料
型號: MC68HC705G4
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 1 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 86/128頁
文件大?。?/td> 290K
代理商: MC68HC705G4
Page 50
MOTOROLA
Section 5: RESET/ INTERRUPT STRUCTURE
MC68HC05G3 (705G4) Specification Rev. 1.1
5.2.3
KEY WAKE-UP INTERRUPT TIMING
A KWI interrupt request is internally latched and synchronized into the KWI circuit
immediately following the falling edge of the KWI source. If KWIE is set, following a delay
of one CPU cycle, it is latched into the CPU. If KWIE is not set, the KWI interrupt will be
pending until KWIE is set and then latched into the CPU one cycle later. If the interrupt
mask bit (I bit) is cleared, the KWI interrupt service routine, specified by the contents of
$3FF8:9, will be executed immediately after being latched by the CPU.
NOTE: If the KWIE is set while a KWI is pending, this interrupt is
serviced one instruction cycle following the register update. It is thus
advised to code as follows:
1) BSET KWIE,INTCR
turn on KWI interrupt
2) NOP
dummy instruction cycle
3) ( next instruction intended )
If a KWI interrupt is pending when the above code sequence is executed, instruction 1) will
enable the KWI interrupt, the KWI interrupt will be latched into the CPU during instruction
2) and the KWI interrupt service routine will be executed immediately before instruction 3).
5.2.4
TIMER 1 INTERRUPT
Three timer 1 interrupts (TOI, ICI, and OC1I) share the same interrupt vector at $FFF6 and
$FFF7. For more information, refer to 8.1 TIMER 1.
5.2.5
TIMER 2 INTERRUPT
Two timer 2 interrupts (TI2I and OC2I) share the same interrupt vector at $FFF4 and
$FFF5. For more information, see 8.2 TIMER 2.
5.2.6
SPI1 AND SPI2 INTERRUPTS
Two SPI (SPI1 and SPI2) transfer complete interrupts share the same interrupt vector at
$FFF2 and $FFF3. For more information, see SECTION 7 SERIAL PERIPHERAL
INTERFACE (SPI).
5.2.7
TB INTERRUPT
The time base interrupt uses the vector at $FFF0 and $FFF1. For more information, see
1.4.1.6 TIME BASE.
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PDF描述
MC68HC05G3 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PQFP80
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相關代理商/技術參數(shù)
參數(shù)描述
MC68HC705J1A 制造商:Freescale Semiconductor 功能描述:
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MC68HC705J1ACP 功能描述:IC MCU 4MHZ 1.2K OTP 20-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:HC05 其它有關文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標準包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C,IrDA,LIN,SPI,UART/USART 外圍設備:DMA,PDR,POR,PVD,PWM,溫度傳感器,WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB(64K x 8) 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 10x12b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN,36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND
MC68HC705J1ACPE 功能描述:8位微控制器 -MCU HCO5 CORE+1.2K RAM + EPR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC68HC705J2CDW 制造商:Motorola Inc 功能描述: 制造商:Motorola Inc 功能描述:MicroController, 8-Bit, 20 Pin, Plastic, SOP