參數(shù)資料
型號： MC68HC916X1
廠商： Motorola, Inc.
英文描述： 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述： 16位微控制器模塊（16位模塊化微控制器）
文件頁數(shù)： 109/172頁
文件大?。?/td> 1035K
代理商： MC68HC916X1
MC68HC916X1
MC68HC916X1TS/D
MOTOROLA
109
CPOL — Clock Polarity
0 = The inactive state value of SCK is logic level zero.
1 = The inactive state value of SCK is logic level one.
CPOL is used to determine the inactive state value of the serial clock (SCK). It is used with CPHA to
produce a desired clock/data relationship between master and slave devices.
CPHA — Clock Phase
0 = Data is captured on the leading edge of SCK and changed on the following edge of SCK.
1 = Data is changed on the leading edge of SCK and captured on the following edge of SCK.
CPHA determines which edge of SCK causes data to change and which edge causes data to be cap-
tured. CPHA is used with CPOL to produce a desired clock/data relationship between master and slave
devices. CPHA is set at reset.
SPBR[7:0] — Serial Clock Baud Rate
The QSPI uses a modulus counter to derive SCK baud rate from the MCU system clock. Baud rate is
selected by writing a value from 2 to 255 into the SPBR[7:0] field. The following equation determines
the SCK baud rate:
or
Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is disabled and as-
sumes its inactive state value. No serial transfers occur. At reset, baud rate is initialized to one eighth
of the system clock frequency.
SPCR1 contains parameters for configuring the QSPI before it is enabled. The CPU can read and
write this register, but the QSM has read access only, except for SPE, which is automatically
cleared by the QSPI after completing all serial transfers, or when a mode fault occurs.
SPE — QSPI Enable
0 = QSPI is disabled. QSPI pins can be used for general-purpose I/O.
1 = QSPI is enabled. Pins allocated by PQSPAR are controlled by the QSPI.
DSCKL[6:0] — Delay before SCK
When the DSCK bit in command RAM is set, this field determines the length of delay from PCS valid to
SCK transition. PCS can be any of the four peripheral chip-select pins. The following equation deter-
mines the actual delay before SCK:
where DSCKL[6:0] equals {1, 2, 3,..., 127}.
When the DSCK value of a queue entry equals zero, then DSCKL[6:0] is not used. Instead, the PCS
valid-to-SCK transition is one-half SCK period.
SPRC1
— QSPI Control Register 1
$YFFC1A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPE
DSCKL[6:0]
DTL[7:0]
RESET:
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
SCK Baud Rate
System Clock
2
SPBR[7:0]
×
-------------------------------------
=
SPBR[7:0]
System Clock
SCK Baud Rate Desired
2
×
-------------------------------------------------------------------------
=
PCS to SCK Delay
DSCKL[6:0]
System Clock
------------------------------------
=
相關(guān)PDF資料
PDF描述
MC68HC9D60 Advance Information - Rev 4.0
MC68HC12D60 Advance Information - Rev 4.0
MC68HCL05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HSC05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HCP11 8-Bit Microcontrollers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC98LJ12CFU 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述:
MC68HC98LJ12CFUE 功能描述:8位微控制器 -MCU 8 BIT MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC9S08RC60 L33R DIE 制造商:Motorola Inc 功能描述:
MC68HCP11A1CFN3 功能描述:8位微控制器 -MCU 8-bit HCMOS single chip MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HCP11A1FN 制造商:MOTORALA 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*