參數(shù)資料
型號： MC68MH360ZQ33LR2
廠商： Freescale Semiconductor
文件頁數(shù)： 145/158頁
文件大?。?/td> 0K
描述： IC MPU QUICC 33MHZ 357-PBGA
標準包裝： 180
系列： M683xx
處理器類型： M683xx 32-位
速度： 33MHz
電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應商設備封裝： 357-PBGA（25x25）
包裝： 帶卷 (TR)
Chapter 5. Buffer Descriptors
Figure 5-13. MPC860MH SCC2 Parameter RAM Usage
IMMR + 3D00
HDLC
UART
Transparent
IMMR + 3D38
IMMR + 3D37
Transparent Regs
= 56 Bytes
IDMA2 Regs
= 64Bytes
HDLC Regs
= 92 Bytes
UART Regs
= 102 Bytes
IMMR + 3D00
QMC*
QMC on
Ethernet*
Ethernet Regs
= 164 Bytes
QMC Regs
= 172 Bytes
Free Area
= 4 Bytes
QMC Regs
= 32 Bytes
Free Area
= 128 Bytes
IMMR + 3D20
IMMR + 3D1F
Multiple SCCs*#
QMC Regs
=12 Bytes
Locations used
Locations free
for SCC registers
for BD
Locations used
for secondary
registers
#—TSATRx & TSATTx are mapped to an alternative SCC’s parameter RAM.
IMMR + 3D80
IMMR + 3D7F
Free Area
= 72Bytes
SPI Regs
= 48Bytes
IMMR + 3DB0
IMMR + 3DAF
Timers Regs
= 16 Bytes
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IMMR + 3D00
IMMR + 3D5C
IMMR + 3D5B
Free Area
= 36 Bytes
IMMR + 3D66
IMMR + 3D65
Free Area
= 26 Bytes
IMMR + 3D00
IMMR + 3DB0
IMMR + 3DAF
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IMMR + 3DA4
IMMR + 3DA3
Free Area
= 12Bytes
IMMR + 3DB0
IMMR + 3DAF
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IMMR + 3DAC
IMMR + 3DAB
IMMR + 3DA0
IMMR + 3D9F
Free Area
= 4 Bytes
IMMR + 3DB0
IMMR + 3DAF
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IMMR + 3DAC
IMMR + 3DAB
*—SPI is not available in these configurations due to memory conflict.
IMMR + 3D80
IMMR + 3D7F
IMMR + 3DB0
IMMR + 3DAF
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IDMA2 Regs
= 64Bytes
SPI Regs
= 48Bytes
Timers Regs
= 16 Bytes
IMMR + 3D80
IMMR + 3D7F
IMMR + 3DB0
IMMR + 3DAF
IMMR + 3DC0
IMMR + 3DBF
IMMR + 3DFF
IDMA2 Regs
= 64Bytes
SPI Regs
= 48Bytes
Timers Regs
= 16 Bytes
IDMA2 Regs
= 64Bytes
Timers Regs
= 16 Bytes
IDMA2 Regs
= 64Bytes
Timers Regs
= 16 Bytes
IDMA2 Regs
= 64Bytes
Timers Regs
= 16 Bytes
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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