- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3954 > MC68MH360ZQ33LR2 (Freescale Semiconductor)IC MPU QUICC 33MHZ 357-PBGA PDF資料下載
參數(shù)資料
| 型號： | MC68MH360ZQ33LR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 87/158頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU QUICC 33MHZ 357-PBGA |
| 標準包裝： | 180 |
| 系列： | M683xx |
| 處理器類型： | M683xx 32-位 |
| 速度： | 33MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁當前第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁
QMC Supplement
2.1.4 TSATRx/TSATTx Channel Pointers
The channel pointers are 12-bit pointers to the channel-specic parameters in the internal
dual-ported RAM. These should not be confused with TSATRx/TSATTx pointers as
described in Section 2.1.3, “TSATRx/TSATTx Pointers and Time Slot Assignment Table.”
The 6 most-signicant bits of the address are taken from the time slot assignment table. For
the MH360, the most-signicant bit must be zero as the addressing range is only 2 Kbytes.
The 6 least-signicant bits are zero, mapping out a 64-byte area for each of the channel-
specic parameters. The channel-specic parameters are common for Rx and Tx. For 32-
channel support, 2 Kbytes of dual-ported RAM is required (32 * 64), and for 64-channel
support, 4 Kbytes of dual-ported RAM is required (64 * 64). In most cases, time slot 0
channel pointer will address the base of dual-ported RAM for logical channel 0, and time
slot 1 channel pointer would address the base of dual-ported RAM + 4 for logical channel 1.
In Figure 2-2, time slot 5 channel pointer addresses logical channel 5, requiring the channel
pointer being set to 0b000101.
NOTE
It is possible to concatenate multiple time slots to one logical
channel. This is achieved by setting the channel pointers of the
grouped time slots to the same logical channel.
2.1.5 Logical Channel TBASE and RBASE
TBASE and RBASE are within the channel-specic parameters. TBASE is the Tx buffer
descriptor base address, and RBASE is the Rx buffer descriptor base address. These 16-bit
offsets from MCBASE point to individual logical channel’s buffer descriptors located
within the buffer descriptor table. Note that there are individual TBASE and RBASE values
for each logical channel.
2.1.6 MCBASE
MCBASE is located in the global multichannel parameters. Each SCC has a unique
MCBASE value pointing to the base of the SCC’s buffer descriptor table in external
memory. For example, the address of logical channel ve’s Tx buffer descriptor table is
MCBASE + logical channel ve TBASE.
2.1.7 Buffer Descriptor Table
A buffer descriptor table for each SCC is located in a 64-Kbyte area of external memory.
This block size is determined by the TBASE and RBASE addressing range. The memory
segment must be long-word-aligned but can start anywhere in memory. Each SCC has a
maximum of 16,384 (64 Kbytes memory
÷ 4-byte pointers) buffers. For a 32-channel
implementation, each logical channel has a maximum of 256 (16,384 / (32 * 2)) buffers for
receive and 256 buffers for transmit. For each logical channel, there is a circular queue with
programmable start address and length.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT70V5378S100BG | IC SRAM 576KBIT 100MHZ 272BGA |
| MC7448HX1000LD | IC MPU RISC 32BIT 360-FCCBGA |
| MC68360ZQ25LR2 | IC MPU QUICC 25MHZ 357-PBGA |
| 346-012-520-804 | CARDEDGE 12POS DUAL .125 GREEN |
| 346-012-520-802 | CARDEDGE 12POS DUAL .125 GREEN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68P11E1CFN2R2 | 制造商:Rochester Electronics LLC 功能描述:8BIT MCU 512RAM A/D EE - Bulk |
| MC68P11E1CFNE2R | 功能描述:8位微控制器 -MCU 8B MCU 512 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MC68P-3-2 | 制造商:PARKER 功能描述: |
| MC-68PLCC | 制造商:SPC Multicomp 功能描述:SOCKET PLCC 68 PIN THRU-HOLE 制造商:SPC Multicomp 功能描述:SOCKET, PLCC, 68 PIN, THRU-HOLE 制造商:PRIVATE LABEL 功能描述:PLCC SOCKET, 68POS, THROUGH HOLE, Connector Type:PLCC Socket, Series:-, No. of C 制造商:SPC Multicomp 功能描述:PLCC SOCKET, 68POS, THROUGH HOLE, Connector Type:PLCC Socket, Series:-, No. of Contacts:68, Pitch Spacing:1.27mm, Contact Termination:Through Hole Vertical, Contact Material:Phosphor Bronze, Contact Plating:Tin , RoHS Compliant: Yes |
| MC-68PLCC | 制造商:SPC Multicomp 功能描述:PLCC SOCKET 68POS THROUGH HOLE |