參數(shù)資料
型號: MCIMX257DVM4
廠商: Freescale Semiconductor
文件頁數(shù): 134/153頁
文件大?。?/td> 0K
描述: IC MPU I.MX25 COMM 400MAPBGA
標(biāo)準(zhǔn)包裝: 90
系列: i.MX25
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 128
程序存儲器類型: 外部程序存儲器
RAM 容量: 144K x 8
電壓 - 電源 (Vcc/Vdd): 1.15 V ~ 1.52 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x12b
振蕩器型: 外部
工作溫度: -20°C ~ 70°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
Freescale Semiconductor
81
Figure 53 shows the ESAI HCKR timing diagram.
Figure 53. ESAI HCKR Timing
Table 60 describes the general timing requirements for the ESAI module. Table 58 and Table 59 describe
respectively the conditions and signals cited in Table 60.
Table 58. ESAI Timing Conditions
Symbol
Significance
Comments
i ck
Internal clock
In the i.MX25, the internal clock frequency is equal to the IP bus frequency
(133 MHz)
x ck
External clock
The external clock may be derived from the CRM module or other external
clock sources
i ck a
Internal clock, asynchronous mode
In asynchronous mode, SCKT and SCKR are different clocks
i ck s
Internal clock, synchronous mode
In synchronous mode, SCKT and SCKR are the same clock
Table 59. ESAI Signals
Signal Name
Significance
SCKT
Transmit clock
SCKR
Receive clock
FST
Transmit frame sync
HCKT
Transmit high-frequency clock
HCKR
Receive high-frequency clock
Table 60. ESAI General Timing Requirements
No.
Characteristics1 2
Symbol
Expression3
Min.
Max.
Condition
Unit
62
Clock cycle4
tSSICC
4
× Tc
4
× Tc
30.0
i ck
ns
63
Clock high period
For internal clock
2
× Tc 9.0
6
—ns
For external clock
2
× Tc
15
64
Clock low period
For internal clock
—2
× Tc 9.0
6
—ns
For external clock
2
× Tc
15
HCKR
SCKR (output)
97
95
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