參數(shù)資料
型號: MCIMX258CJM4
廠商: Freescale Semiconductor
文件頁數(shù): 26/153頁
文件大?。?/td> 0K
描述: MPU IMX25 IND 400-MAPBGA
特色產(chǎn)品: MCIMX25 Applications Processors
標(biāo)準(zhǔn)包裝: 90
系列: i.MX25
核心處理器: ARM9
芯體尺寸: 32-位
速度: 400MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 128
程序存儲器類型: 外部程序存儲器
RAM 容量: 144K x 8
電壓 - 電源 (Vcc/Vdd): 1.15 V ~ 1.52 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 3x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 400-LFBGA
包裝: 托盤
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
Freescale Semiconductor
121
Table 95 shows the USB port timing specification in VP_VM bidirectional mode.
3.7.20.1.4
VP_VM Unidirectional Mode Timing
Table 96 defines the signals for USB in VP_VM unidirectional mode.
Table 95. USB Port Timing Specifications in VP_VM Bidirectional Mode
No.
Parameter
Signal Name
Direction
Min.
Max.
Unit
Condition/
Reference Signal
US18
Tx rise/fall time
USB_DAT_VP
Out
5.0
ns
50 pF
US19
Tx rise/fall time
USB_SE0_VM
Out
5.0
ns
50 pF
US20
Tx rise/fall time
USB_TXOE_B
Out
5.0
ns
50 pF
US21
Tx duty cycle
USB_DAT_VP
Out
49.0
51.0
%
US22
Tx high overlap
USB_SE0_VM
Out
0.0
ns
USB_DAT_VP
US23
Tx low overlap
USB_SE0_VM
Out
0.0
ns
USB_DAT_VP
US24
Enable delay
USB_DAT_VP
USB_SE0_VM
In
8.0
ns
USB_TXOE_B
US25
Disable delay
USB_DAT_VP
USB_SE0_VM
In
10.0
ns
USB_TXOE_B
US26
Rx rise/fall time
USB_DAT_VP
In
3.0
ns
35 pF
US27
Rx rise/fall time
USB_SE0_VM
In
3.0
ns
35 pF
US28
Rx skew
USB_DAT_VP
Out
–4.0
+4.0
ns
USB_SE0_VM
US29
Rx skew
USB_RCV
Out
–6.0
+2.0
ns
USB_DAT_VP
Table 96. Signal Definitions for USB VP_VM Unidirectional Mode
Name
Direction
Signal Description
USB_TXOE_B
Out
Transmit enable, active low
USB_DAT_VP
Out
Tx VP data when USB_TXOE_B is low
USB_SE0_VM
Out
Tx VM data when USB_TXOE_B is low
USB_VP1
In
Rx VP data when USB_TXOE_B is high
USB_VM1
In
Rx VM data when USB_TXOE_B is high
USB_RCV
In
Differential Rx data
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