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參數(shù)資料
| 型號： | MCM62Y308J17 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | Synchronous Line Buffer:8K x 8 Bit Fast Static Dual Ported Memory |
| 中文描述： | 8K X 8 MULTI-PORT SRAM, 17 ns, PDSO32 |
| 封裝： | 0.300 INCH, SOJ-32 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 257K |
| 代理商： | MCM62Y308J17 |
MCM62Y308
13
MOTOROLA FAST SRAM
Table 4. RDCOUNT Scan Register Bit Definitions
Bit
Number
Bit/Pin
Name*
Bit/Pin
Type
0
RAC0
Input
1
RAC1
Input
2
RAC2
Input
3
RAC3
Input
4
RAC4
Input
5
RAC5
Input
6
RAC6
Input
7
RAC7
Input
8
RAC8
Input
9
RAC9
Input
10
RAC10
Input
11
RAC11
Input
12
RAC12
Input
13
RAC13#
Input
14
RAC14#
Input
15
RAC15#
Input
16
WAC0
Input
17
WAC1
Input
18
WAC2
Input
19
WAC3
Input
20
WAC4
Input
21
WAC5
Input
22
WAC6
Input
23
WAC7
Input
24
WAC8
Input
25
WAC9
Input
26
WAC10
Input
27
WAC11
Input
28
WAC12
Input
29
WAC13#
Input
30
WAC14#
Input
31
WAC15#
Input
* RAC = Read Address Counter
WAC = Write Address Counter
# These register bits are compared to the three
Expand ID bits in the Control Register. (EX0 – 2).
Only when there is a match is the read or write
allowed to occur.
NOTE: Bit 0 closest to TDO.
Table 5. EZWRITE Scan Path Bit Definitions
Bit
Number
Pin
Name
Pin
Type
0
D7
Input
1
D6
Input
2
D5
Input
3
D4
Input
4
D3
Input
5
D2
Input
6
D1
Input
7
D0
Input
Table 6. EZREAD and EZREADZ Scan
Path Bit Definitions
Bit
Number
Bit/Pin
Name
Bit/Pin
Type
0
Q0
Output
1
Q1
Output
2
Q2
Output
3
Q3
Output
4
Q4
Output
5
Q5
Output
6
Q6
Output
7
Q7
Output
Table 7. LDRREG Scan Path Bit Definitions
Bit
Number
Bit/Pin
Name*
Bit/Pin
Type
0
RRR0
Register bit
1
RRR1
Register bit
2
RRR2
Register bit
3
RRR3
Register bit
4
RRR4
Register bit
5
RRR5
Register bit
6
RRR6
Register bit
7
RRR7
Register bit
8
RRR8
Register bit
9
RRR9
Register bit
10
RRR10
Register bit
11
RRR11
Register bit
12
RRR12
Register bit
13
RRR13
Register bit
14
RRR14
Register bit
15
RRR15
Register bit
* RRR = Read Reload Register
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