參數(shù)資料
型號(hào)： MCV14AI/SL
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14
封裝： 3.90 MM, PLASTIC, SOIC-4
文件頁(yè)數(shù)： 27/84頁(yè)
文件大小： 1007K
代理商： MCV14AI/SL
2009 Microchip Technology Inc.
Preliminary
DS41338B-page 31
MCV14A
6.1
Using Timer0 with an External
Clock
When an external clock input is used for Timer0, it must
meet
certain
requirements.
The
external
clock
requirement is due to internal phase clock (TOSC)
synchronization. Also, there is a delay in the actual
incrementing of Timer0 after synchronization.
6.1.1
EXTERNAL CLOCK
SYNCHRONIZATION
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks (Figure 6-4).
Therefore, it is necessary for T0CKI to be high for at
least 2 TOSC (and a small RC delay of 2 Tt0H) and low
for at least 2 TOSC (and a small RC delay of 2 Tt0H).
Refer to the electrical specification of the desired
device.
When a prescaler is used, the external clock input is
divided by the asynchronous ripple counter-type
prescaler, so that the prescaler output is symmetrical.
For the external clock to meet the sampling require-
ment, the ripple counter must be taken into account.
Therefore, it is necessary for T0CKI to have a period of
at least 4 TOSC (and a small RC delay of 4 Tt0H)
divided by the prescaler value. The only requirement
on T0CKI high and low time is that they do not violate
the minimum pulse width requirement of Tt0H. Refer to
parameters 40, 41 and 42 in the electrical specification
of the desired device.
6.1.2
TIMER0 INCREMENT DELAY
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0
module is actually incremented. Figure 6-4 shows the
delay from the external clock edge to the timer
incrementing.
FIGURE 6-4:
TIMER0 TIMING WITH EXTERNAL CLOCK
Increment Timer0 (Q4)
External Clock Input or
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
Q1 Q2
Q3
Q4
Timer0
T0
T0 + 1
T0 + 2
Small pulse
misses sampling
External Clock/Prescaler
Output After Sampling
(3)
Prescaler Output (2)
(1)
Note 1:
Delay from clock input change to Timer0 increment is 3 TOSC to 7 TOSC. (Duration of Q = TOSC). Therefore, the error
in measuring the interval between two edges on Timer0 input = ±4 TOSC max.
2:
External clock if no prescaler selected; prescaler output otherwise.
3:
The arrows indicate the points in time where sampling occurs.
相關(guān)PDF資料
PDF描述
MCV14ATI/SL 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14
MCV14AI/P 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDIP14
MD8031AHB883B 8-BIT, 12 MHz, MICROCONTROLLER, CDIP40
MD8255A 24 I/O, PIA-GENERAL PURPOSE, PDIP40
MD82C52-/883 1 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, CDIP28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCV15/10-GF-381 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 10WAY
MCV15/2-GF-381 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 2WAY
MCV15/3-GF-381 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 3WAY
MCV15/4-GF-381 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 4WAY
MCV15/5-GF-381 制造商:Phoenix Contact 功能描述:HEADER PCB VERTICAL 3.81MM 5WAY
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*