OPERATIONAL MODES Figure 16. Transitions to" />
參數(shù)資料
型號(hào): MCZ33742EG
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 29/71頁(yè)
文件大?。?/td> 0K
描述: IC SYSTEM BASIS CHIP CAN 28-SOIC
標(biāo)準(zhǔn)包裝: 26
應(yīng)用: 自動(dòng)
電流 - 電源: 42mA
電源電壓: 5.5 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
產(chǎn)品目錄頁(yè)面: 808 (CN2011-ZH PDF)
Analog Integrated Circuit Device Data
Freescale Semiconductor
35
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Figure 16. Transitions to Enter Debug Modes
Figure 17. Simplified 33742S State Diagram in Debug Modes
Normal Request
Standby Debug
SPI: MCR (0000) and Normal Debug
Normal
W
at
ch
do
g
:
T
ri
g
ge
r
Reset
Reset Counter
(3.4 ms) Expired
Watchdog: Timeout 350 ms
Normal Debug
SPI: MCR (0000) and Standby Debug
Power
Down
Wake-up
SPI
:S
tandb
y&
W
atchd
og:
T
rigg
e
r
Wake-up
Normal Request
Standby Debug
SP
I:
Normal
Debug
Normal
Watc
hdog
: Trig
ger
Standby
SPI: Standby Debug
SPI
:S
tandb
yD
ebug
SP
I: N
orm
al D
ebu
g
Reset
Reset Counter
(3.4 ms) Expired
Watchdog: Timeout 350 ms
&!
BA
TF
AI
L
&
NOS
T
OP
&
SPI
:Sleep
SPI: Normal Debug
Normal Debug
SP
I: St
andb
y D
eb
ug
Stop Debug
SP
I:
S
to
p
Wa
ke
-u
p
E
SP
I:
S
top
Deb
ug
&
CS
Low
to
High
T
ransit
ion
R
(1) If Stop mode is entered, it is entered without watchdog, no matter the WDSTOP bit.
(E) Debug mode entry point (Step 5 of the Debug mode entering sequence).
(R) Represents transitions to Reset mode due to V1 low.
Sleep
Stop (1)
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