參數(shù)資料
型號: MCZ33742EG
廠商: Freescale Semiconductor
文件頁數(shù): 55/71頁
文件大?。?/td> 0K
描述: IC SYSTEM BASIS CHIP CAN 28-SOIC
標(biāo)準(zhǔn)包裝: 26
應(yīng)用: 自動
電流 - 電源: 42mA
電源電壓: 5.5 V ~ 18 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 808 (CN2011-ZH PDF)
Analog Integrated Circuit Device Data
Freescale Semiconductor
59
33742
TYPICAL APPLICATIONS
Figure 33. Power up sequence, No W/D write at first
POWER UP AND VDD GOING LOW WITH STOP MODE AS DEFAULT LOW POWER MODE IS SELECTED
The first part of Figure 34 is identical to Figure 33. If VDD is pulled below VDD under-voltage reset (typ 4.6 V), say by an over-
current or short-circuit (for instance, short to 4.0 V), and if a low power mode previously selected was Stop mode, the 33742
enters Reset mode (RST pin is active). The WDOG pin stays HIGH, but the high level (Voh) follows V1 level. The INT pin goes
LOW.
When the VDD overload condition is removed, the 33742 restarts in Normal Request mode.
Figure 34. Under-voltage on VDD
VDD
SPI (CS)
WD
RST
INT
SBC in
Reset
mode
350ms
SBC in Normal Request
& Reset modes
Reset each 350 ms
SBC in Normal
mode
SBC in Normal
Request & Reset
mode
Watchdog Refresh
Missing Watchdog Refresh
Watchdog
Refresh
VDD
SPI (CS)
WD
RST
INT
SBC in
Reset
mode
SBC in Normal Request
& Reset modes
Reset each 350 ms
SBC in Normal
mode
SBC in Normal
Reset mode
350 ms
Watchdog Refresh
Under-voltage at VDD (VDD < VRSTTH)
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