參數(shù)資料
型號(hào): MDS212CG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: 12-Port 10/100Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA456
封裝: 35 X 35 MM, 2.33 MM HEIGHT, MS-034, HSBGA-456
文件頁(yè)數(shù): 49/111頁(yè)
文件大?。?/td> 1609K
代理商: MDS212CG
MDS212
Data Sheet
49
Zarlink Semiconductor Inc.
12.3.4 CPU Receiving Multicast Frame
The MDS212 is capable of receiving a multicast packet for a combination of local or remote ports and the CPU. In
this case, the received frame includes multicast destination ports on a remote device, and also the CPU. The
Search Engine moves the multicast frame to the FDB and then forms a switch request including the frame header,
which it sends to the Search Engine. Since the frame involves the CPU, the Search Engine passes the request to
the HISC for further processing. The HISC informs the CPU via a mail, which indicates the handle of the FDB. In
parallel, the Search Engine sends back a switch response and asks the Frame Engine to forward the frame to the
destinations ports. The Frame Engine will perform the same multicast forwarding as mentioned above.
The CPU reads the frame from the FDB via the MDS212. The CPU will then inform the HISC to release the FDB.
Finally, the HISC passes the release command to the Frame Engine to release the FDB accommodated CPU
frame.
Note:
The Search Engine will not release the FDB until it receives the release signal from the HISC and the counter
is reduced to zero. This occurs when the CPU all of the ports have read the frame.
13.0 Port Mirroring
13.1 Features
The received or transmitted data of any 10/100 port in any MDS212 chip, connected by Port Mirror signal pins,
PM_DO and PM_DI, can be chosen to be mirrored to the “Mirror Port.” The mirror port can be the first port in a
MDS212 with RMII or a dedicated mirror port with MII, driven by the pin, PM_DO[0:1]. Once the first RMII port of a
chip is selected to be the mirror port, it cannot be used to serve as a data port. The configuration of port mirroring is
shown in the following diagram, based on the current evaluation board design.
Figure 17 - Configuration of Mirror Port for MDS212
MDS212
MDS212
Chip 0
PM_DO[1:0]
PM_DENO
PM_DI[1:0]
PM_DENI
Chip 1
PM_DO[1:0]
PM_DENO
4FE
RMII
4FE
RMII
4FE
RMII
4FE
RMII
4FE
RMII
4FE
RMII
MII
PHY
Port
0 1 2 3
4 5 6 7
8 9 10 11
12 13 14 15
16 17 18 19
20 21 22 23
Mirror
Port
Mirror
Port
Mirror
Port
-Port 0 can be a RMII mirror port and mirror port 1-11
-Port 12 can be a RMII mirror port and mirror port 0-11, 13-23
-Dedicated MII mirror port can mirror port 0-23
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