參數(shù)資料
型號(hào): MDS213
廠商: Zarlink Semiconductor Inc.
英文描述: 12-Port 10/100Mbps + 1Gbps Ethernet Switch
中文描述: 12口10/100Mbps千兆以太網(wǎng)交換機(jī)
文件頁(yè)數(shù): 42/120頁(yè)
文件大?。?/td> 1678K
代理商: MDS213
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MDS213
Data Sheet
42
Zarlink Semiconductor Inc.
10.0 The Control Bus
The CPU Interface, or Control Bus, provides the communication path between the system CPU and all other key
components within the MDS213 (i.e. the HISC). It operates in two modes: managed mode, where it utilizes an
external CPU, and unmanaged mode, where an external CPU does not exist.
In Managed mode, the CPU Interface provides the communication path between the systems' external CPU and
the HISC, Frame Buffer Memory (SRAM) or another MDS213. See Figure 11.
Figure 11 - CPU Interface Configuration in Managed Mode
In unmanaged mode, the CPU Interface provides the communication path between the Switch Devices and Flash
Memory, and between any two MDS213 Switches. See Figure 12.
Figure 12 - Control Bus Configuration in Unmanaged Mode
10.1 External CPU Support
The control bus comprises of a 32-bit wide CPU bus and supports Big and Little Endian CPU byte ordering. The
standard microprocessors supported include:
Intel 486 CPUs
Motorola MPC860 and 801 CPUs
Intel i960Jx CPU
MIPS processor with minimum conversion
MDS213
MDS213
CPU
Flash
Memory
Control Bus
MDS213
MDS213
Flash
Memory
Control Bus
Primary DEV
Secondary DEV
Arbitrator
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