參數(shù)資料
型號: MDS213
廠商: Zarlink Semiconductor Inc.
英文描述: 12-Port 10/100Mbps + 1Gbps Ethernet Switch
中文描述: 12口10/100Mbps千兆以太網(wǎng)交換機
文件頁數(shù): 55/120頁
文件大?。?/td> 1678K
代理商: MDS213
MDS213
Data Sheet
55
Zarlink Semiconductor Inc.
14.2.4 MDS213 Data Structures For VLAN Implementation
Figure 20 - Data Structure Diagram
14.2.4.1 VLAN ID Table
The VLAN ID Table is used by Search Engine for unicast frames. The base address of this table is specified by
VIDB subfield in BIT[5:0] of VTBP register.
The contents of this table are set up by the MDS213's microcode through the command of CPU software at the time
of VLAN creation and deletion. The VLAN ID Table covers the entire 4K VLAN ID space, and is used by the Search
Engine to map the VLAN ID into an internal VLAN Index. It also includes port membership and port tagging
information for each VLAN. Each VLAN ID entry is 8 bytes long, and the total size of the VLAN ID Table is 32KB.
The VLAN ID table must be located at the 32K boundary.
Figure 21 - VLAN ID Table
Bit[1:0] P0VLAN Status for Port 0
Bit [0]SThis port is a member of this VLAN
Bit [1]TTagout
Bit[3:2] P1 VLAN status for Port 1
….
External RAM
FDB
Frame Data Buffers
Programmable Size
0
FDB block must start from 0
Transmission queues
CPU/HISC Mailing List
VLAN ID Table
(4k entry, 8B/entry)
(2k entry, 256/128/64 bit)
ByteByte Byte ByteByte ByteByte Byte
7
6
5
4
3
2
1
0
Programmable Size
64, 32 or 16KB
(up to the number of
supported VLAN)
VLAN MAC Table
32KB
MAX
1/2MB, 1MB or 2MB
63
3
1
Index[3:
0]
Index[7:
4]
3
0
2
9
2
8
2
7
C VP12P11P10 P9
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
P8
1
6
1
5
P7
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
P6 P5 P4 P3 P2 P1 T
P16
P17
S
P28
Byte
0
4
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