MFRC522_35
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NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
34 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
9.2 Register overview
Table 20.
Address
(hex)
Page 0: Command and status
00h
Reserved
01h
CommandReg
02h
ComlEnReg
03h
DivlEnReg
04h
ComIrqReg
05h
DivIrqReg
06h
ErrorReg
MFRC522 register overview
Register name
Function
Refer to
reserved for future use
starts and stops command execution
enable and disable interrupt request control bits
enable and disable interrupt request control bits
interrupt request bits
interrupt request bits
error bits showing the error status of the last command
executed
communication status bits
receiver and transmitter status bits
input and output of 64 byte FIFO buffer
number of bytes stored in the FIFO buffer
level for FIFO underflow and overflow warning
miscellaneous control registers
adjustments for bit-oriented frames
Table 21 on page 36
Table 23 on page 36
Table 25 on page 36
Table 27 on page 37
Table 29 on page 37
Table 31 on page 38
Table 33 on page 39
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
Status1Reg
Status2Reg
FIFODataReg
FIFOLevelReg
WaterLevelReg
ControlReg
BitFramingReg
Table 35 on page 40
Table 37 on page 41
Table 39 on page 42
Table 41 on page 42
Table 43 on page 42
Table 45 on page 43
Table 47 on page 44
0Eh
CollReg
bit position of the first bit-collision detected on the RF
interface
reserved for future use
Table 49 on page 44
0Fh
Page 1: Command
10h
11h
12h
13h
14h
Reserved
Table 51 on page 45
Reserved
ModeReg
TxModeReg
RxModeReg
TxControlReg
reserved for future use
defines general modes for transmitting and receiving
defines transmission data rate and framing
defines reception data rate and framing
controls the logical behavior of the antenna driver pins TX1
and TX2
controls the setting of the transmission modulation
selects the internal sources for the antenna driver
selects internal receiver settings
selects thresholds for the bit decoder
defines demodulator settings
reserved for future use
reserved for future use
controls some MIFARE communication transmit parameters
controls some MIFARE communication receive parameters
reserved for future use
selects the speed of the serial UART interface
Table 53 on page 45
Table 55 on page 46
Table 57 on page 46
Table 59 on page 47
Table 61 on page 48
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Page 2: Configuration
20h
TxASKReg
TxSelReg
RxSelReg
RxThresholdReg
DemodReg
Reserved
Reserved
MfTxReg
MfRxReg
Reserved
SerialSpeedReg
Table 63 on page 49
Table 65 on page 49
Table 67 on page 50
Table 69 on page 51
Table 71 on page 51
Table 73 on page 52
Table 75 on page 52
Table 77 on page 52
Table 79 on page 53
Table 81 on page 53
Table 83 on page 53
Reserved
reserved for future use
Table 85 on page 54