參數(shù)資料
型號: MFRC52201HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網絡
英文描述: Contactless reader IC
封裝: MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 42/92頁
文件大?。?/td> 691K
代理商: MFRC52201HN1
MFRC522_35
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NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
42 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
9.3.1.10
FIFODataReg register
Input and output of 64 byte FIFO buffer.
Table 39.
Bit
Symbol
Access
Table 40.
Bit
7 to 0
9.3.1.11
FIFOLevelReg register
Indicates the number of bytes stored in the FIFO.
Table 41.
Bit
Symbol
Access
Table 42.
Bit
7
9.3.1.12
WaterLevelReg register
Defines the level for FIFO under- and overflow warning.
Table 43.
Bit
Symbol
Access
FIFODataReg register (address 09h); reset value: xxh bit allocation
7
6
5
FIFOData[7:0]
4
3
2
1
0
D
FIFODataReg register bit descriptions
Symbol
Description
FIFOData[7:0]
data input and output port for the internal 64-byte FIFO buffer
FIFO buffer acts as parallel in/parallel out converter for all serial data
stream inputs and outputs
FIFOLevelReg register (address 0Ah); reset value: 00h bit allocation
7
6
5
FlushBuffer
W
4
3
2
1
0
FIFOLevel[6:0]
R
FIFOLevelReg register bit descriptions
Symbol
Value
Description
FlushBuffer 1
immediately clears the internal FIFO buffer’s read and write pointer
and ErrorReg register’s BufferOvfl bit
reading this bit always returns 0
6 to 0 FIFOLevel
[6:0]
writing to the FIFODataReg register increments and reading
decrements the FIFOLevel value
-
indicates the number of bytes stored in the FIFO buffer
WaterLevelReg register (address 0Bh); reset value: 08h bit allocation
7
6
5
4
reserved
-
3
2
1
0
WaterLevel[5:0]
R/W
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