參數(shù)資料
型號: MFRC52201HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52201HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 64/92頁
文件大?。?/td> 691K
代理商: MFRC52201HN1
MFRC522_35
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.5 — 21 June 2010
112135
64 of 92
NXP Semiconductors
MFRC522
Contactless reader IC
Table 133. AnalogTestReg register (address 38h); reset value: 00h bit allocation
Bit
7
6
5
Symbol
AnalogSelAux1[3:0]
Access
R/W
Table 134. AnalogTestReg register bit descriptions
Bit
Symbol
Value Description
7 to 4 AnalogSelAux1
[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
[1]
Remark:
Current source output; the use of 1 k
Ω
pull-down resistor on AUXn is recommended.
4
3
2
1
0
AnalogSelAux2[3:0]
R/W
controls pin AUX1
3-state
output of TestDAC1 (AUX1), output of TestDAC2 (AUX2)
[1]
test signal Corr1
[1]
reserved
DAC: test signal MinLevel
[1]
DAC: test signal ADC_I
[1]
DAC: test signal ADC_Q
[1]
reserved
reserved, test signal for production test
[1]
reserved
HIGH
LOW
TxActive:
at 106 kBd: HIGH during Start bit, Data bit, Parity and CRC
at 212 kBd: 424 kBd and 848 kBd: HIGH during data and
CRC
RxActive:
at 106 kBd: HIGH during Data bit, Parity and CRC
at 212 kBd: 424 kBd and 848 kBd: HIGH during data and
CRC
subcarrier detected:
106 kBd: not applicable
212 kBd: 424 kBd and 848 kBd: HIGH during last part of
data and CRC
test bus bit as defined by the TestSel1Reg register’s
TstBusBitSel[2:0] bits
Remark:
all test signals are described in
Section 16.1 on
page 79
controls pin AUX2 (see bit descriptions for AUX1)
1101
1110
1111
3 to 0 AnalogSelAux2
[3:0]
-
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