參數(shù)資料
型號: MK10X512VMD100
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PBGA144
封裝: 13 X 13 MM, MAPBGA-144
文件頁數(shù): 7/66頁
文件大小: 984K
代理商: MK10X512VMD100
5.1.4 Power mode transition operating behaviors
In the table below, all specifications except tPOR, assume the following clock
configuration:
CPU and system clocks = 100MHz
Bus and FlexBus clocks = 50 MHz
Flash clock = 25 MHz
Table 4. Power mode transition operating behaviors
Symbol
Description
Min.
Max.
Unit
Notes
tPOR
After a POR event, amount of time from the point VDD
reaches 1.8V to execution of the first instruction
across the operating temperature range of the chip.
300
μs
RUN → VLLS1 → RUN
RUN → VLLS1
VLLS1 → RUN
4.1
123.8
μs
RUN → VLLS2 → RUN
RUN → VLLS2
VLLS2 → RUN
4.1
49.3
μs
RUN → VLLS3 → RUN
RUN → VLLS3
VLLS3 → RUN
4.1
49.2
μs
RUN → LLS → RUN
RUN → LLS
LLS → RUN
4.1
5.9
μs
RUN → STOP → RUN
RUN → STOP
STOP → RUN
4.1
4.2
μs
RUN → VLPS → RUN
RUN → VLPS
VLPS → RUN
4.1
5.8
μs
1. Normal boot (FTFL_OPT[LPBOOT]=1)
General
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
15
Preliminary
相關(guān)PDF資料
PDF描述
MK1493-02AGTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AGLF 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AGLFTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK1493-02AG 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
MK2049-10SITRLF 44.736 MHz, OTHER CLOCK GENERATOR, PDSO20
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