144
QFP
144
BGA
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
67
L11 DISABLED
PTA15
SPI0_SCK
UART0_RX
FB_AD30
I2S0_RXD
68
K10 DISABLED
PTA16
SPI0_SOUT
UART0_CTS
_b
FB_AD29
I2S0_RX_FS
69
K11 ADC1_SE17
ADC1_SE17
PTA17
SPI0_SIN
UART0_RTS
_b
FB_AD28
I2S0_MCLK
I2S0_CLKIN
70
E8 VDD
VDD
71
G8 VSS
VSS
72
M12 EXTAL
EXTAL
PTA18
FTM0_FLT2
FTM_CLKIN0
73
M11 XTAL
XTAL
PTA19
FTM1_FLT0
FTM_CLKIN1
LPT0_ALT1
74
L12 RESET_b
RESET_b
75
K12 DISABLED
PTA24
FB_AD14
76
J12 DISABLED
PTA25
FB_AD13
77
J11 DISABLED
PTA26
FB_AD12
78
J10 DISABLED
PTA27
FB_AD11
79
H12 DISABLED
PTA28
FB_AD10
80
H11 DISABLED
PTA29
FB_AD19
81
H10 LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
PTB0
I2C0_SCL
FTM1_CH0
FTM1_QD_P
HA
LCD_P0
82
H9 LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
PTB1
I2C0_SDA
FTM1_CH1
FTM1_QD_P
HB
LCD_P1
83
G12 LCD_P2/
ADC0_SE12/
TSI0_CH7
LCD_P2/
ADC0_SE12/
TSI0_CH7
PTB2
I2C0_SCL
UART0_RTS
_b
FTM0_FLT3
LCD_P2
84
G11 LCD_P3/
ADC0_SE13/
TSI0_CH8
LCD_P3/
ADC0_SE13/
TSI0_CH8
PTB3
I2C0_SDA
UART0_CTS
_b
FTM0_FLT0
LCD_P3
85
G10 LCD_P4/
ADC1_SE10
LCD_P4/
ADC1_SE10
PTB4
FTM1_FLT0
LCD_P4
86
G9 LCD_P5/
ADC1_SE11
LCD_P5/
ADC1_SE11
PTB5
FTM2_FLT0
LCD_P5
87
F12 LCD_P6/
ADC1_SE12
LCD_P6/
ADC1_SE12
PTB6
LCD_P6
88
F11 LCD_P7/
ADC1_SE13
LCD_P7/
ADC1_SE13
PTB7
LCD_P7
89
F10 LCD_P8
LCD_P8
PTB8
UART3_RTS
_b
LCD_P8
90
F9
LCD_P9
PTB9
SPI1_PCS1
UART3_CTS
_b
LCD_P9
91
E12 LCD_P10/
ADC1_SE14
LCD_P10/
ADC1_SE14
PTB10
SPI1_PCS0
UART3_RX
FTM0_FLT1
LCD_P10
92
E11 LCD_P11/
ADC1_SE15
LCD_P11/
ADC1_SE15
PTB11
SPI1_SCK
UART3_TX
FTM0_FLT2
LCD_P11
93
H7 VSS
VSS
Pinout
K40 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
63
Preliminary