參數(shù)資料
型號(hào): MPC7455
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: RISC Microprocessor Hardware Specifications
中文描述: RISC微處理器硬件規(guī)格
文件頁(yè)數(shù): 9/64頁(yè)
文件大?。?/td> 1127K
代理商: MPC7455
MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1
Freescale Semiconductor
9
General Parameters
4
General Parameters
The following list provides a summary of the general parameters of the MPC7455:
Technology
Die size
Transistor count
Logic design
Packages
0.18 μm CMOS, six-layer metal
8.69 mm
×
12.17 mm (106 mm
2
)
33 million
Fully-static
MPC7445: Surface mount 360 ceramic ball grid array (CBGA)
MPC7455: Surface mount 483 ceramic ball grid array (CBGA)
1.3 V ± 50 mV DC nominal
1.8 V ± 5% DC, or
Core power supply
I/O power supply
2.5 V ± 5% DC, or
1.5 V ± 5% DC (L3 interface only)
Cache level
L2
L2
L2 tags and controller
only (see off-chip cache
support below)
Size/associativity
256-Kbyte/8-Way
256-Kbyte/8-Way
Access width
256 Bits
256 Bits
Number of 32-byte sectors/line
2
2
Parity
Byte
Byte
Off-Chip Cache Support
2
Cache level
L3
L3
L2
On-chip tag logical size
1MB, 2MB
1MB, 2MB
0.5MB, 1MB, 2MB
Associativity
8-Way
8-Way
2-Way
Number of 32-byte sectors/line
2, 4
2, 4
1, 2, 4
Off-chip data SRAM support
MSUG2 DDR, LW, PB2 MSUG2 DDR, LW, PB2
LW, PB2, PB3
Data path width
64
64
64
Direct mapped SRAM sizes
1 Mbyte, 2 Mbytes
1 Mbyte, 2 Mbytes
0.5 Mbyte, 1 Mbyte,
2 Mbytes
3
Parity
Byte
Byte
Byte
Notes:
1. Numbers in parentheses are for 2:1 SRAM.
2. Not implemented on MPC7445 or MPC7441.
3. Private memory feature not implemented on MPC7400.
Table 1. Microarchitecture Comparison (continued)
Microarchitectural Specs
MPC7455/MPC7445
MPC7450/MPC7451/
MPC7441
MPC7400/MPC7410
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