參數(shù)資料
型號(hào): MPC745CVT350LE
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 47/56頁(yè)
文件大?。?/td> 0K
描述: MCU HIP4DP 350MHZ 255-PBGA
標(biāo)準(zhǔn)包裝: 60
系列: MPC7xx
處理器類型: 32-位 MPC7xx PowerPC
速度: 350MHz
電壓: 2V
安裝類型: 表面貼裝
封裝/外殼: 255-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 255-FCPBGA(21x21)
包裝: 托盤
MPC755 RISC Microprocessor Hardware Specifications, Rev. 8
Freescale Semiconductor
51
Document Revision History
4
Added 450 MHz speed bin.
Changed Table 16 to show 450 MHz part in example.
Added row for 433 and 450 MHz core frequencies to Table 17.
In Section 1.8.8, revised the heat sink vendor list.
In Section 1.8.8.2, revised the interface vendor list.
3
Updated format and thermal resistance specifications of Table 4.
Reformatted Tables 9, 10, 11, and 12.
Added dimensions A3, D1, and E1 to Figures 18, 19, and 20.
Revised Section 1.8.7 and Figure 25, removed Figure 26 and Table 19 (information now included in
Figure 25).
Reformatted Section 1.10.
Clarified address bus and address attribute pull-up recommendations in Section 1.8.7.
Clarified Table 2.
Updated voltage sequencing requirements in Table 1 and removed Section 1.8.3.
2
1.8 V/2.0 V mode no longer supported; added 2.5 V support.
Removed 1.8 V/2.0 V mode data from Tables 2, 3, and 6.
Added 2.5 V mode data to Tables 2, 3, and 6.
Extended recommended operating voltage (down to 1.8 V) for VDD, AVDD, and L2AVDD for 300 and
350 MHz parts in Table 3.
Updated Table 7 and test conditions for power consumption specifications.
Corrected Note 6 of Table 9 to include TLBISYNC as a mode-select signal.
Updated AC timing specifications in Table 10.
Updated AC timing specifications in Table 12.
Corrected AC timing specifications in Table 13.
Added L1_TSTCLK, L2_TSTCLK, and LSSD_MODE pull-up requirements to Section 1.8.6.
Corrected Figure 22.
Table 19. Document Revision History (continued)
Revision
Date
Substantive Change(s)
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