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參數(shù)資料
| 型號： | MPC8358EZQAGDGA |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 30/95頁 |
| 文件大小： | 0K |
| 描述： | MPU POWERQUICC II PRO 668-PBGA |
| 標準包裝： | 36 |
| 系列： | MPC83xx |
| 處理器類型： | 32-位 MPC83xx PowerQUICC II Pro |
| 速度： | 400MHz |
| 電壓： | 1.2V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 668-BBGA 裸露焊盤 |
| 供應商設備封裝： | 668-PBGA-PGE（29x29） |
| 包裝： | 托盤 |
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MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
36
Freescale Semiconductor
UCC Ethernet Controller: Three-Speed Ethernet, MII Management
Figure 19 shows the RGMII and RTBI AC timing and multiplexing diagrams.
Figure 19. RGMII and RTBI AC Timing and Multiplexing Diagrams
GTX_CLK125 reference clock duty cycle
tG125H/tG125
47
—
53
%
—
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to represent
RGMII and RTBI timing. For example, the subscript of tRGT represents the TBI (T) receive (Rx) clock. Note also that the
notation for rise (R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews,
the subscript is skew (SK) followed by the clock that is being skewed (RGT).
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns
will be added to the associated clock signal.
3. For 10 and 100 Mbps, tRGT scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
as the minimum duty cycle is not violated and stretching occurs for no more than three tRGT of the lowest speed transitioned
between.
5. Duty cycle reference is LVDD/2.
6. This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention.
7. In rev. 2.1 silicon, due to errata, tSKRGTKHDX minimum is –0.65 ns for UCC2 option 1 and –0.9 for UCC2 option 2, and
tSKRGTKHDV maximum is 0.75 ns for UCC1 and UCC2 option 1 and 0.85 for UCC2 option 2. UCC1 does meet tSKRGTKHDX
minimum for rev. 2.1 silicon.
Table 34. RGMII and RTBI AC Timing Specifications (continued)
At recommended operating conditions with LVDD of 2.5 V ± 5%.
Parameter/Condition
Symbol1
Min
Typ
Max
Unit
Notes
GTX_CLK
tRGT
tRGTH
tSKRGTKHDX
TX_CTL
TXD[8:5]
TXD[7:4]
TXD[9]
TXERR
TXD[4]
TXEN
TXD[3:0]
(At Transmitter)
TXD[8:5][3:0]
TXD[7:4][3:0]
TX_CLK
(At PHY)
RX_CTL
RXD[8:5]
RXD[7:4]
RXD[9]
RXERR
RXD[4]
RXDV
RXD[3:0]
RXD[8:5][3:0]
RXD[7:4][3:0]
RX_CLK
(At PHY)
tSKRGTKHDX
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MPC8358EZUADDE | 功能描述:微處理器 - MPU 8360 TBGA ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8358EZUADDEA | 功能描述:微處理器 - MPU 8360 TBGA ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC8358EZUADDGA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8360E/MPC8358E PowerQUICC II Pro Processor |
| MPC8358EZUAGDEA | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC8360E/MPC8358E PowerQUICC II Pro Processor |
| MPC8358EZUAGDG | 功能描述:微處理器 - MPU 8360 TBGA ENCRP RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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