參數(shù)資料
型號: MPC8560VTAQFC
廠商: Freescale Semiconductor
文件頁數(shù): 4/108頁
文件大?。?/td> 0K
描述: MPU POWERQUICC III 783FCPBGA
標準包裝: 36
系列: MPC85xx
處理器類型: 32-位 MPC85xx PowerQUICC III
速度: 1.0GHz
電壓: 1.3V
安裝類型: 表面貼裝
封裝/外殼: 784-BBGA,F(xiàn)CBGA
供應商設備封裝: 783-FCPBGA(29x29)
包裝: 托盤
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
Freescale Semiconductor
101
Document Revision History
3.0
Table 1—Corrected MII management voltage reference
Section 2.1.3—New
Table 2—Corrected MII management voltage reference
Table 5—Removed ‘minimum’ column
Table 5—Added AVDD power table
Table 8—New
Table 9—New
Table 13—Added overshoot/undershoot note.
Table 16—Restated tMCKSKEW1 as tMCKSKEW, removed tMCKSKEW2; added speed-specific minimum
values for 333, 266, and 200 MHz; updated tDDSHME values.
Updated chapter to reflect that GMII, MII and TBI can be run with 2.5V signalling.
Table 29—Added MDIO output valid timing
Table 31—Updated tLBIVKH1, tLBIXKH1, and tLBOTOT.
Table 32—New
Figure 20, Figure 22—Updated clock reference
Table 34—Updated tTDIVKH
Table 35—Updated tTDKHOX
Added tables and figures for CPM I2C
Table 45—Updated tPCIVKH
Section 14.1— Changed minimum height from 2.22 to 3.07 and maximum from 2.76 to 3.75
Table 54.—Updated MII management voltage reference and added note 20.
Section 16.2.4.1—Changed
θJC from 0.3 to 0.8; changed die-junction temperature from 67° to 71°
Section 17.7—Added paragraph that begins “TSEC1_TXD[3:0]...”
2.1
Section 2.1.3—New
Table 16—Added speed-specific minimum values for 333, 266, and 200 MHz
Table 31—Replaced all references to TSEC1_TXD[6:5] to TSEC2_TXD[6:5]
Table 31—Added tLBSKEW and note 3
Table 31—Added comment about rev. 2.x devices to note 5
Section 14.1— Changed minimum height from 2.22 to 3.07 and maximum from 2.76 to 3.75
Section 16.2.4.1—Changed
θJC from 0.3 to 0.8; changed die-junction temperature from 67° to 71°
Section 17.7—Added paragraph that begins “TSEC1_TXD[3:0]...”
Table 62. Document Revision History (continued)
Rev. No.
Substantive Change(s)
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