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參數(shù)資料
| 型號： | MPT612FBD48 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Maximum power point tracking IC |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT313-2, LQFP-48 |
| 文件頁數(shù)： | 18/37頁 |
| 文件大?。?/td> | 607K |
| 代理商： | MPT612FBD48 |
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NXP Semiconductors
MPT612
Maximum power point tracking IC
values are preserved throughout Power-down mode. In addition, the logic levels of chip
output pins remain static. Power-down mode can be exited and normal operation
resumed by either a reset or via specific interrupts that function without clock signals.
Power-down mode reduces chip power consumption to nearly zero because all dynamic
device operation is suspended.
Selecting an external 32 kHz clock instead of the PCLK as the clock-source for the
on-chip RTC enables the core to keep the RTC active during Power-down mode. Power-
down current is increased when the RTC is active. However, the current consumption is
significantly lower than that in Idle mode.
In Deep-power down mode, all power is removed from the internal chip logic except for
the RTC module, the I/O ports, the SRAM and the 32 kHz external oscillator. Additional
power savings are provided when SRAM and the 32 kHz oscillator are powered down
individually. Deep power-down mode has the lowest possible power consumption without
removing power from the entire chip. In Deep power-down mode, the contents of
registers and memory are not preserved except for SRAM (if selected) and three general
purpose registers. To resume operation, a full chip reset is required.
To conserve battery power, a power selector module switches the RTC power supply
from V
DD(RTC)
to V
DDC
whenever the core voltage is present on pin V
DDC
.
A power control feature for peripherals enables individual peripherals to be turned off
when they are not needed in the application. This results in additional power savings
during Active and Idle modes.
7.17.8 APB
The APB divider determines the relationship between the processor clock (CCLK) and
the clock used for peripheral devices (PCLK). The APB divider serves two purposes. The
first is to provide peripherals with the desired PCLK via the APB divider so that they can
operate at the chosen ARM processor speed. In order to achieve this, the APB divider
may be slowed down to between 50 % and 25 % of the processor clock rate. The default
condition on reset is the APB divider running at 25 % of the processor clock rate. This is
because the APB divider must work correctly during power-up (and its timing cannot be
altered if it does not work since its control registers reside on the APB). The second
purpose of the APB divider is to allow power saving when an application does not require
any peripherals running at the full processor rate. The PLL remains active (if it was
running) during Idle mode because the APB divider is connected to the PLL output.
7.17.9 Emulation and debugging
The MPT612 supports emulation and debugging using the JTAG serial port.
7.17.10 EmbeddedICE
Standard ARM EmbeddedICE logic provides on-chip debug support. Debugging of the
target system requires a host computer running the debugger software and an
EmbeddedICE protocol converter. The EmbeddedICE protocol converter converts the
remote debug protocol commands to the JTAG data needed for accessing the ARM core.
The ARM core contains a built-in a debug communication channel function. The debug
communication channel allows a program running on the target system to communicate
with the host debugger/another host without stopping the program flow or entering the
debug state.
The debug communication channel is accessed as coprocessor 14 by the program
running on the ARM7TDMI-S core. The debug communication channel allows the JTAG
MPT612
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 September 2010
18 of 18
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相關代理商/技術參數(shù) |
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| MPT612FBD48,151 | 功能描述:ARM微控制器 - MCU 32b 32K Flash 28I/O RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| MPT612FBD48151 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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| MPT-65_11 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:65W Triple Output Medical Type |
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