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Motorola Sensor Device Data
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Oscillator
The oscillator has been redesigned to center the nominal
frequency within the trimming range and to have better
temperature compensation. As shown in Figure 1, the
oscillator controls three switched capacitor circuit sub–
blocks within the ASIC, thus having direct impact on their
performance. The trimmable oscillator enhances the con-
trol of other performance parameters and enables the part
to meet tighter specification tolerances. Additionally, the
placement of the oscillator on the silicon die has changed,
contributing to a 50% reduction in the noise of the part.
Power Supply Filter
An internal capacitor has been added between the VDD and
VSS pins to provide some de–coupling of the power supply.
Also, a lowpass filter has been added to the circuitry that
supplies power to the transducer element and that sets the
DC level of the capacitance–to–voltage converter stage.
The filter response suppresses high frequency noise, but
maintains a ratiometric output.
New Sensing Scheme
The capacitance–to–voltage converter employs innovative
circuit techniques (at the time of this writing, patents are
pending) to improve signal ratiometricity. Amplification is
achieved using an EPROM trimmable gain stage, provid-
ing capability for both coarse and fine tuning. As in the
previous version of the control ASIC, the second gain stage
is cascaded by a switched capacitor four pole Bessel low-
pass filter, with a unity gain response and –3 dB frequency
at 400 Hz.
Temperature Compensation
The final stage in the ASIC performs temperature com-
pensation of gain. Thus, the temperature coefficient for
sensitivity is set using EPROM trim.
PERFORMANCE ENHANCEMENTS
Motorola’s new MMA1201P accelerometer provides perfor-
mance enhancements in a number of areas, including ratio-
metric output, signal–to–noise ratio, output filter response,
and temperature compensation. For complete details, refer to
the MMA1201P data sheet.
Ratiometric Output
The offset voltage and the sensitivity of the part are ratio-
metric with supply voltage. Typical error values are less
than 0.5%.
Signal to Noise Ratio
The noise has been reduced by 50% and is specified at
3.5 mVRMS maximum. Typical values are about
2.0 mVRMS. As a result, the signal to noise ratio of the
part is about 50 dB.
Lowpass Filter Response
The frequency response of the four pole Bessel lowpass
filter has the –3 dB frequency at 400 Hz. The tolerance has
been narrowed by 60% and is specified at
40 Hz.
Temperature Compensation
The sensitivity is very uniform over temperature, with typi-
cal errors of about
1% over the specified temperature
range. Also, although the spec allows for the equivalent of
5 mV/
°
C for the temperature coefficient of offset, typical
values are actually less than 2 mV/
°
C, at VDD equal to 5 V.
INTERFACE CONSIDERATIONS
With only four active pin connections, Motorola’s accel-
erometers are very easy to use. There are only a few simple
considerations to be taken into account to ensure reliable
operation and attain the high level of performance that the can
part offer.
Power Supply
Power is applied to the accelerometer through the VDD pin.
For optimum performance, it is recommended that the part
be powered with a voltage regulator such as the Motorola
MC78L05. An optional 0.1
μ
F capacitor can be placed on
the VDD pin to complement the accelerometer’s internal
capacitor and provide additional de–coupling of the supply.
The capacitor should be physically located as close as
possible to the accelerometer.
Ground
Ground is applied through the VSS pin. Whenever pos-
sible it is recommended that a solid ground plane be used
so that the impedance of the ground path is minimized. If
this is not possible, it is strongly recommended that a low
impedance trace (no additional components should be
connected to it) be used to directly connect the VSS pin to
the power supply ground.
Self–test
The ST pin is an active, high logic level input pin that pro-
vides a way for the user to verify proper operation of the
part. It is pulled down internally. Therefore, for normal
operation, the user could apply a logic level “0” or leave it
unconnected. Applying a logic level “1” to the ST pin will
apply the equivalent of a 25 g acceleration to the trans-
ducer, and the user should see a change in the output
equivalent to 25 times the part’s rated sensitivity.
Output
The accelerometer’s output is measured at the VOUT pin.
As shown in Figure 1, the ASIC’s oscillator controls the
switched capacitor lowpass filter, with a nominal operating
frequency of 65 kHz. As a result, a clock noise component
of about 2 mVpeak may be present at 65 kHz. Therefore, it
is recommended that the user place a simple RC lowpass
filter on the VOUT pin to reduce the clock noise present in
the output signal. Recommended values are a 1 k
resistor
and a 0.01
μ
F capacitor. These values produce a filter with
a –3 dB frequency at about 16 kHz, which will not interfere
with the response of the internal Bessel filter, yet will pro-
vide sufficient attenuation (approximately –12 dB) of the
clock noise.
Placing a filter on the output is especially recommended for
applications where the signal will be fed into a stand–alone
A/D converter, and in cases where the signal will be ampli-
fied to a level where the amplified clock noise may begin to
contribute significantly to the noise floor of the system.
However, if using an MCU or microprocessor in the system,
the user may choose to use a software algorithm to digitally
filter the signal, instead of using the analog RC filter. This
option would have to be evaluated based on the system
performance requirements.
F
Freescale Semiconductor, Inc.
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