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參數(shù)資料
| 型號(hào)： | MSM5424331 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 222,720-Word 】 24-Bit Field Memory |
| 中文描述： | 222720詞】24位場(chǎng)記憶 |
| 文件頁數(shù)： | 10/34頁 |
| 文件大?。?/td> | 245K |
| 代理商： | MSM5424331 |
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FEDS5424331-01
1
Semiconductor
MSM5424331
10/34
OPERATION MODE
FIFO Mode
The FIFO mode is set when the D/F pin is set low.
1.
1.1 Write operation
Before the write operation begins, X address (or line address) must be input to set the initial bit address for the
following serial write access. When
LWE
or
UWE
is low, a set of serial write data on DIN0-11 or DIN12-
23 is written into write registers attached to the DRAM memory arrays temporarily on the rising edge of
WCLK. The
LWE
pin controls the write operation of DIN0 to DIN11 (12 bits) and the
UWE
pin controls the
write operation of DIN12 to DIN23 (12 bits).
Following 24-bit-width serial input data is written into the memory locations in the write register designated
by an internal write address pointer which is advanced by WCLK. This enables continuous serial write on a
line. When write clock WCLK and read clock RCLK are tied together and are controlled by a common clock
or CLK, more than two MSM5424331 can be cascaded directly without any delay devices between the
MSM5424331 because the read timing is delayed by one CLK cycle to the write timing. When the write
operation on a line is terminated, be sure to perform a write transfer operation by WR/TR in order to store the
written data in the write registers to the corresponding memory cells in the DRAM memory arrays.
Write
1.2 Write address pointer increment operation
The write address pointer is incremented synchronously with WCLK when
LWE
or
UWE
is low.
Relationship between the
LWE
,
UWE
, and IE input levels,
Write Address pointer, and data input status
WCLK Rise
LWE
UWE
IE
L
L
H
L
H
H
H
L
H
L
L
L
L
H
L
H
L
L
H
H
—
Internal Write Address Pointer
Data Input
Increments both L- and U-banks.
Increments the L-bank only.
Increments the U-bank only.
Increments both L- and U-banks.
Increments the L-bank only.
Increments the U-bank only.
Stopped
Inputted
Not Inputted
When
LWE
or
UWE
is low and IE is high, the write operation is enabled.
If IE level goes low while WCLK is active, the write operation is halted but the write address pointer will
continue to advance. That is, IE enables a write mask function. When
LWE
or
UWE
goes high, the write
address pointer stops without WCLK.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM5424331TS-AK | 222,720-Word 】 24-Bit Field Memory |
| MSM5432126A | 131,072-Word X 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5432126A-40 | 131,072-Word X 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5432126A-40GS-K | 131,072-Word X 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5432126A-45 | 131,072-Word X 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
相關(guān)代理商/技術(shù)參數(shù) |
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| MSM548262-60JS | 制造商:ROHM Semiconductor 功能描述: |
| MSM548262-60T3-K | 制造商:ROHM Semiconductor 功能描述: |
| MSM548262-60TK | 制造商:OK International 功能描述: |
| MSM548262-60TS-K | 制造商:ROHM Semiconductor 功能描述: |
| MSM548262-70JS | 制造商:ROHM Semiconductor 功能描述: |
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