參數(shù)資料
型號: MSM9225BGA-2K
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 31/95頁
文件大小: 567K
代理商: MSM9225BGA-2K
MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 24
(1) Baud rate prescaler: BRP5 to BRP0
This is a 6-bit field to set the BTL cycle time of the basic clock for communication operation.
Table 2-5 shows the relationship between the bit content and BTL.
The BTL cycle time is given by the following equation:
BTL cycle time = 2
× (BRP setting value + 1)/f
OSC
where f
OSC is the oscillation frequency.
At reset, BRP5 to BRP0 are set to “000000”.
Table 2-5 BTL Cycle Time Setting
BRP5
BRP4
BRP3
BRP2
BRP0
BTL cycle time
000000
1
× System clock period
000001
2
× System clock period
111110
63
× System clock period
111111
64
× System clock period
System clock: the clock 1/2 the frequency of the oscillation frequency
(2) SJW: SJWA, SJWB
This is a 2-bit field to set SJW.
Table 2-6 shows the relationship between bit content and SJW.
At reset, SJWA and SJWB are set to “00”.
Table 2-6 Setting of SJW1 and SJW2
SJWB
SJWA
SJW1, SJW2
00
1
× BTL cycle
012
× BTL cycle
103
× BTL cycle
114
× BTL cycle
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