參數(shù)資料
型號: MSM9225BGA-2K
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁數(shù): 49/95頁
文件大?。?/td> 567K
代理商: MSM9225BGA-2K
MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 40
2.4.15 CAN Status Register 2 (CANS2: BEhex)
This is a register to indicate the error contents for when an error occurs.
If an error occurs, the corresponding flag is set to “1”. It is set to “0” when “0” is written to it from the
microcontroller.
Once a flag of this register is set to “1”, it will not be reset to “0” unless “0” is written to it. Therefore, when a
corresponding error flag is set to “1”, and after that if another error occurs when “0” is not written from the
microcontroller, it results in two error flags, the previous one and the current one, being set to “1”.
The bit configuration is shown below.
MSB
BOF
Not
used
Not
used
FEF
CRC
ACK
STUF BITE
LSB
CANS2 (BEhex), R/W: R/W
Initial
0
00
value:
0
Bit error does not occur
1
Bit error occurs
0
Stuff error does not occur
1
Stuff error occurs
0
Acknowledgment error does not occur
1
Acknowledgment error occurs
0
CRC error does not occur
1
CRC error occurs
0
Form error does not occur
1
Form error occurs
Unused bit.
Write a “0”.
0
Bus off does not occur
1
Bus off occurs
Operation varies depending on the
value of the COMPAT bit of CANC2
(8Fhex):
COMPAT = 0: Holds “1” till “0” is
written by the
microcontroller.
COMPAT = 1: Becomes “0” if “0” is
written by the
microcontroller or the
bus off state is
released.
Figure 2-40 CAN Status Register 2 (CANS2)
(1) Bit error flag: BITE
This bit becomes “1” when a bit error occurs.
At reset or after release of the bus off state, this bit becomes “0”.
(2) Stuff error flag: STUF
This bit becomes “1” when a stuff error occurs.
At reset or after release of the bus off state, this bit becomes “0”.
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