參數(shù)資料
型號(hào)： MSM9225BGA-2K
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁數(shù)： 35/95頁
文件大?。?/td> 567K
代理商： MSM9225BGA-2K
MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 27
(4) Resynchronization
When a negative edge of the CAN bus signal is detected in the period of SJW, the internal bit status is
shifted for resynchronization as shown in Figure 2-26.
Internal bit
status
Period where
resynchronization can be done
TSEG2
SYNC SJW1
TSEG1
1 bit time
Sampling Point
Period where resynchronization
can be done
SJW2 SYNC SJW1
TSEG1
TSEG2 SJW2
TSEG2
SYNC SJW1
TSEG1
SJW2 SYNC SJW1
TSEG1
TSEG2 SJW2
TSEG2
SYNC SJW1
TSEG1
SJW2 SYNC SJW1
TSEG1
TSEG2 SJW2
CAN bus
signal
Before
resynchronization
After
resynchronization
When a negative edge is detected in the period of
SJW, the internal bit status is shifted.
Figure 2-26 Resynchronization in the period of SJW
When a negative edge is detected outside the period of SJW, the resynchronization method shown in
Figure 2-27 will be done.
(a)
If a negative edge lies before the sampling point
The sampling point is shifted afterward by SJW to resynchronize the internal bit status with the CAN
bus signal.
(b)
If a negative edge lies after the sampling point
The period of SJW is deleted to resynchronize the internal bit status with the CAN bus signal.
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