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| 型號(hào)： | MSM9225BGA-2K |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 9/95頁(yè) |
| 文件大?。?/td> | 567K |
| 代理商： | MSM9225BGA-2K |
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MSM9225B User’s Manual
Chapter 2 Register Descriptions
2 – 4
2.3
Message Memory Related Register
2.3.1 Message Control Register (MCR: x0hex)
This register performs various controls for a message.
Set this register for each message box.
The bit configuration is as follows:
MSB
MMA
OW
TRQ
RCS
EIR
EIT
FRM
ARES
LSB
MCR (x0hex), R/W: R/W
Initial
value:
00
0
Data frame automatic transmission
disabled for remote frame reception.
1
Data frame automatic transmission
enabled for remote frame reception.
0
Frame type specification
1
See Table 2-2 for details.
0
Setting the transmission completion
interrupt request flag (ITF) is disabled.
1
Setting the transmission completion
interrupt request flag (ITF) is enabled.
0
Setting the receive completion interrupt
request flag (IRF) is disabled.
1
Setting the receive completion interrupt
request flag (IRF) is enabled.
0
Cleared to “0” by the microcontroller.
1
“1” is set at the completion of reception.
0
Cleared to “0” at the end of transmission.
1
Write a “1” for transmission
(transmission request).
0
No message overwrite
1
Message has been overwritten
0
Writing disabled from the microcontroller to the message box. Transmission and reception are
possible.
1
Writing enabled from the microcontroller to the message box. Transmission and reception
stopped.
Figure 2-2 Message Control Register (MCR)
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