參數(shù)資料
型號： MSP430BT5190IZQW
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： RISC MICROCONTROLLER, PBGA113
封裝： LEAD FREE, PLASTIC, BGA-113
文件頁數(shù)： 50/97頁
文件大?。?/td> 724K
代理商： MSP430BT5190IZQW
PRODUCTPREVIEW
MSP430BT5190
SLAS703 – APRIL 2010
www.ti.com
PMM, SVS Low Side
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SVSLE = 0, PMMCOREV = 2
0
nA
I(SVSL)
SVSL current consumption
SVSLE = 1, PMMCOREV = 2, SVSLFP = 0
200
nA
SVSLE = 1, PMMCOREV = 2, SVSLFP = 1
1.5
A
SVSLE = 1, dVCORE/dt = 10 mV/s,
2.5
SVSLFP = 1
tpd(SVSL)
SVSL propagation delay
s
SVSLE = 1, dVCORE/dt = 1 mV/s,
20
SVSLFP = 0
SVSLE = 0
→ 1, dVCORE/dt = 10 mV/s,
12.5
SVSLFP = 1
t(SVSL)
SVSL on/off delay time
s
SVSLE = 0
→ 1, dVCORE/dt = 1 mV/s,
100
SVSLFP = 0
PMM, SVM Low Side
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SVMLE = 0, PMMCOREV = 2
0
nA
I(SVML)
SVML current consumption
SVMLE= 1, PMMCOREV = 2, SVMLFP = 0
200
nA
SVMLE= 1, PMMCOREV = 2, SVMLFP = 1
1.5
A
SVMLE = 1, dVCORE/dt = 10 mV/s,
2.5
SVMLFP = 1
tpd(SVML)
SVML propagation delay
s
SVMLE = 1, dVCORE/dt = 1 mV/s,
20
SVMLFP = 0
SVMLE = 0
→ 1, dVCORE/dt = 10 mV/s,
12.5
SVMLFP = 1
t(SVML)
SVML on/off delay time
s
SVMLE = 0
→ 1, dVCORE/dt = 1 mV/s,
100
SVMLFP = 0
Wake-up from Low Power Modes and Reset
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
Wake-up time from
PMMCOREV = SVSMLRRL = n,
fMCLK ≥ 4.0 MHz
5
tWAKE-UP-
LPM2, LPM3, or LPM4
where n = 0, 1, 2, or 3
s
FAST
fMCLK < 4.0 MHz
6
to active mode(1)
SVSLFP = 1
Wake-up time from
tWAKE-UP-
PMMCOREV = SVSMLRRL = n, where n = 0, 1, 2, or 3
LPM2, LPM3 or LPM4 to
150
165
s
SLOW
SVSLFP = 0
active mode(2)
Wake-up time from
tWAKE-UP-
LPM4.5 to active
2
3
ms
LPM5
mode(3)
Wake-up time from RST
tWAKE-UP-
or BOR event to active
2
3
ms
RESET
mode(3)
(1)
This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance
mode of the low side supervisor (SVSL) and low side monitor (SVML). Fastest wakeup times are possible with SVSLand SVML in full
performance mode or disabled when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while
operating in LPM2, LPM3, and LPM4. Please refer to the Power Management Module and Supply Voltage Supervisor chapter in the
MSP430x5xx Family User's Guide (SLAU208).
(2)
This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance
mode of the low side supervisor (SVSL) and low side monitor (SVML). In this case, the SVSLand SVML are in normal mode (low current)
mode when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while operating in LPM2, LPM3, and
LPM4. Please refer to the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx Family User's Guide
(3)
This value represents the time from the wakeup event to the reset vector execution.
54
Copyright 2010, Texas Instruments Incorporated
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