參數(shù)資料
型號: MSP430BT5190IZQW
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PBGA113
封裝: LEAD FREE, PLASTIC, BGA-113
文件頁數(shù): 51/97頁
文件大?。?/td> 724K
代理商: MSP430BT5190IZQW
PRODUCTPREVIEW
MSP430BT5190
www.ti.com
SLAS703 – APRIL 2010
Timer_A
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
1.8 V/
fTA
Timer_A input clock frequency
External: TACLK
25
MHz
3.0 V
Duty cycle = 50% ± 10%
All capture inputs.
1.8 V/
tTA,cap
Timer_A capture timing
Minimum pulse width required for
20
ns
3.0 V
capture.
Timer_B
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
1.8 V/
fTB
Timer_B input clock frequency
External: TBCLK
25
MHz
3.0 V
Duty cycle = 50% ± 10%
All capture inputs.
1.8 V/
tTB,cap
Timer_B capture timing
Minimum pulse width required for
20
ns
3.0 V
capture.
USCI (UART Mode) - recommended operating conditions
PARAMETER
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
fUSCI
USCI input clock frequency
External: UCLK
fSYSTEM
MHz
Duty cycle = 50% ± 10%
BITCLK clock frequency
fBITCLK
1
MHz
(equals baud rate in MBaud)
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
2.2 V
50
600
tt
UART receive deglitch time(1)
ns
3 V
50
600
(1)
Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
Copyright 2010, Texas Instruments Incorporated
55
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