
MSP430C33x, MSP430P337A
MIXED SIGNAL MICROCONTROLLERS
SLAS227A – OCTOBER 1999 – REVISED JUNE 2000
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
instruction set
The instruction set for this register-register architecture provides a powerful and easy-to-use assembly
language. The instruction set consists of 51 instructions with three formats and seven addressing modes.
Table 1 provides a summation and example of the three types of instruction formats; the address modes are
listed in Table 2.
Table 1. Instruction Word Formats
Dual operands, source-destination
e.g. ADD R4,R5
R4 + R5
→ R5
Single operands, destination only
e.g. CALL R8
PC
→ (TOS), R8→ PC
Relative jump, un-/conditional
e.g. JNE
Jump-on equal bit = 0
Instructions that can operate on both word and byte data are differentiated by the suffix .B when a byte operation
is required.
Examples:
Instructions for word operation:
Instructions for byte operation:
MOV
EDE,TONI
MOV.B
EDE,TONI
ADD
#235h,&MEM
ADD.B
#35h,&MEM
PUSH
R5
PUSH.B
R5
SWPB
R5
–––
Table 2. Address Mode Descriptions
ADDRESS MODE
S
D
SYNTAX
EXAMPLE
OPERATION
Register
√
MOV Rs,Rd
MOV R10,R11
R10
→ R11
Indexed
√
MOV X(Rn),Y(Rm)
MOV 2(R5),6(R6)
M(2+R5)
→ M(6+R6)
Symbolic (PC relative)
√
MOV EDE,TONI
M(EDE)
→ M(TONI)
Absolute
√
MOV &MEM,&TCDAT
M(MEM)
→ M(TCDAT)
Indirect
√
MOV @Rn,Y(Rm)
MOV @R10,Tab(R6)
M(R10)
→ M(Tab+R6)
Indirect autoincrement
√
MOV @Rn+,Rm
MOV @R10+,R11
M(R10)
→ R11
R10 + 2
→ R10
Immediate
√
MOV #X,TONI
MOV #45,TONI
#45
→ M(TONI)
NOTE 1: S = source, D = destination.
Computed branches (BR) and subroutine calls (CALL) instructions use the same address modes as the other
instructions. These addressing modes provide
indirect addressing, ideally suited for computed branches and
calls. The full use of this programming capability permits a program structure different from conventional 8- and
16-bit controllers. For example, numerous routines can easily be designed to deal with pointers and stacks
instead of using flag type programs for flow control.