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參數(shù)資料
| 型號： | MSP430C336IPJM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 3.8 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, MS-022, QFP-100 |
| 文件頁數(shù)： | 4/42頁 |
| 文件大小： | 637K |
| 代理商： | MSP430C336IPJM |
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MSP430C33x, MSP430P337A
MIXED SIGNAL MICROCONTROLLERS
SLAS227A – OCTOBER 1999 – REVISED JUNE 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
LCD drive
The liquid crystal displays (LCDs) for static, 2-, 3-, and 4-MUX operation can be driven directly. The operation
of the controller LCD logic is defined by software through memory-bit manipulation. The LCD memory is part
of the LCD module, not part of data memory. Eight mode and control bits define the operation and current
consumption of the LCD drive. The information for the individual digits can be easily obtained using table
programming techniques combined with the proper addressing mode. The segment information is stored into
LCD memory using instructions for memory manipulation.
The drive capability is defined by the external resistor divider that supports analog levels for 2-, 3-, and 4-MUX
operation. Groups of the LCD segment lines can be selected for digital output signals. The MSP430x33x
configuration has four common lines, 30 segment lines, and four terminals for adjusting the analog levels.
Basic Timer1
The Basic Timer1 (BT1) divides the frequency of MCLK or ACLK, as selected with the SSEL bit, to provide
low-frequency control signals. This is done within the system by one central divider, the Basic Timer1, to support
low current applications. The BTCTL control register contains the flags which control or select the different
operational functions. When the supply voltage is applied or when a reset of the device (RST/NMI pin), a
watchdog overflow, or a watchdog security key violation occurs, all bits in the register hold undefined or
unchanged status. The user software usually configures the operational conditions on the BT during
initialization.
The Basic Timer1 has two eight bit timers which can be cascaded to a sixteen bit timer. Both timers can be read
and written by software. Two bits in the SFR address range handle the system control interaction according to
the function implemented in the Basic Timer1. These two bits are the Basic Timer1 interrupt flag (BTIFG) and
the Basic Timer1 interrupt enable (BTIE) bit.
Watchdog Timer
The primary function of the Watchdog Timer (WDT) module is to perform a controlled system restart after a
software upset has occurred. If the selected time interval expires, a system reset is generated. If this watchdog
function is not needed in an application, the module can work as an interval timer, which generates an interrupt
after the selected time interval.
The Watchdog Timer counter (WDTCNT) is a 15/16-bit upcounter which is not directly accessible by software.
The WDTCNT is controlled using the Watchdog Timer control register (WDTCTL), which is an 8-bit read/write
register. Writing to WDTCTL, in both operating modes (watchdog or timer) is only possible by using the correct
password in the high-byte. The low-byte stores data written to the WDTCTL. The high-byte password is 05Ah.
If any value other than 05Ah is written to the high-byte of the WDTCTL, a system reset PUC is generated. When
the password is read its value is 069h. This minimizes accidental write operations to the WDTCTL register
. In
addition to the Watchdog Timer control bits, there are two bits included in the WDTCTL that configure the NMI
pin.
USART
The universal synchronous/asynchronous interface is a dedicated peripheral module which provides serial
communications. The USART supports synchronous SPI (3 or 4 pin) and asynchronous UART communications
protocols, using double buffered transmit and receive channels. Data streams of 7 or 8 bits in length can be
transferred at a rate determined by the program, or by a rate defined by an external clock. Low-power
applications are optimized by UART mode options which allow for the receipt of only the first byte of a complete
frame. The applications software then decides if the succeeding data is to be processed. This option reduces
power consumption.
Two dedicated interrupt vectors are assigned to the USART module, one for the receive and one for the transmit
channel.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSP430C336PJM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C337 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C337HFD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C337IPJM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C337PJM | 制造商:TI 制造商全稱:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
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