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Micron Technology, Inc., reserves the right to change products or specifications without notice.

512MBDDRx4x8x16_2.fm - Rev. J 1/06 EN

512Mb: x4, x8, x16 DDR SDRAM

Commands

SELF REFRESH

The SELF REFRESH command can be used to retain data in the DDR SDRAM, even if the

rest of the system is powered down. When in the self refresh mode, the DDR SDRAM

retains data without external clocking. The SELF REFRESH command is initiated like an

AUTO REFRESH command except CKE is disabled (LOW). The DLL is automatically dis-

abled upon entering SELF REFRESH and is automatically enabled upon exiting SELF

REFRESH (A DLL reset and 200 clock cycles must then occur before a READ command

can be issued). Input signals except CKE are “Don’t Care” during SELF REFRESH. VREF

voltage is also required for the full duration of SELF REFRESH.

The procedure for exiting self refresh requires a sequence of commands. First, CK and

CK# must be stable prior to CKE going back HIGH. Once CKE is HIGH, the DDR SDRAM

must have NOP commands issued for tXSNR because time is required for the comple-

tion of any internal refresh in progress. A simple algorithm for meeting both refresh and

DLL requirements is to apply NOPs for tXSNR time, then a DLL RESET (via the extended

mode register) and NOPs for 200 additional clock cycles before applying any other com-

mand.

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
MT46V128M4T67A3WC1	制造商:Micron Technology Inc 功能描述:128MX4 DDR SDRAM DIE-COM COMMERCIAL 2.5V - Trays
MT46V128M4TG-5B/D	制造商:Samsung Semiconductor 功能描述:

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