![](http://datasheet.mmic.net.cn/180000/MT57W4MH9CF-6_datasheet_11334057/MT57W4MH9CF-6_26.png)
4 MEG x 8, 4 MEG x 9, 2 MEG x 18, 1 MEG x 36
1.8V VDD, HSTL, DDR SIO SRAM
ADVANCE
36Mb: 1.8V VDD, HSTL, QDRB2 SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT57W2MH18C_B.fm – Rev. B, Pub. 2/03
26
2003 Micron Technology, Inc.
NOTE:
1. Data in output register is not guaranteed if EXTEST instruction is loaded.
2. After performing EXTEST, power-up conditions are required in order to return part to normal operation.
Table 17:
Identification Register Definitions
INSTRUCTION FIELD
ALL DEVICES
DESCRIPTION
REVISION NUMBER
(31:29)
000
Version number.
DEVICE ID
(28:12)
00def0wx0t0q0b0s0
def = 010 for 36Mb density
def = 001 for 18Mb density
wx = 11 for x36 width
wx = 10 for x18 width
wx = 00 for x9 width
wx = 01 for x8 width
t = 1 for DLL version
t = 0 for non-DLL version
q = 1 for QDR
q = 0 for DDR
b = 1 for 4-word burst
b = 0 for 2-word burst
s = 1 for separate I/O
s = 0 for common I/O
MICRON JEDEC ID
CODE (11:1)
00000101100
Allows unique identification of SRAM vendor.
ID Register Presence
Indicator (0)
1
Indicates the presence of an ID register.
Table 18:
Scan Register Size
REGISTER NAME
BIT SIZE
Instruction
3
Bypass
1
ID
32
Boundary Scan
109
Table 19:
Instruction Codes
INSTRUCTION
CODE
DESCRIPTION
NOTES
EXTEST
000
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO.
IDCODE
001
Loads the ID register with the vendor ID code and places the register
between TDI and TDO. This operation does not affect SRAM operations.
SAMPLE Z
010
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. Forces all SRAM output drivers to a High-Z state.
RESERVED
011
Do Not Use: This instruction is reserved for future use.
SAMPLE/PRELOAD
100
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO.
RESERVED
101
Do Not Use: This instruction is reserved for future use.
RESERVED
110
Do Not Use: This instruction is reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This operation does not
affect SRAM operations.