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| 型號： | OM13013,598 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 22/61頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DEMO IAR LPC1227 JLINKLITE |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | LPC1227 |
| 所含物品： | 板 |
| 其它名稱： | 568-6885 |
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LPC122X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 August 2011
29 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
8.
Limiting values
[1]
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless
otherwise noted.
[2]
Including voltage on outputs in 3-state mode.
[3]
The peak current is limited to 25 times the corresponding maximum current.
[4]
Dependent on package type.
[5]
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k
series resistor.
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VDD(3V3)
supply voltage (3.3 V)
3.0
3.6
V
VDD(IO)
input/output supply voltage
3.0
3.6
V
VI
input voltage
on all digital pins
0.5
+3.6
V
on pins PIO0_10
and PIO0_11
(I2C-bus pins)
05.5
V
IDD
supply current
per supply pin
[3] -
100
mA
ISS
ground current
per ground pin
[3] -
100
mA
Ilatch
I/O latch-up current
(0.5V
DD) < VI <
(1.5VDD);
Tj < 125 C
-
100
mA
Tstg
storage temperature
65
+150
C
Ptot(pack)
total power dissipation (per package)
based on package
heat transfer, not
device power
consumption
-1.5
W
VESD
electrostatic discharge voltage
human body
model; all pins
8000
+8000
V
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