參數(shù)資料
型號(hào): P610ARM-FPNR
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 92/173頁
文件大?。?/td> 897K
代理商: P610ARM-FPNR
Configuration
ARM610 Data Sheet
5-4
C Bit 2
Cache Enable/Disable
0 - Instruction / data cache turned off
1 - Instruction / data cache turned on
W Bit 3
Write buffer Enable/Disable
0 - Write buffer turned off
1 - Write buffer turned on
P Bit 4
ARM 32/26-bit Program Space
0 - 26-bit Program Space selected
1 - 32-bit Program Space selected
D Bit 5
ARM 32/26-bit Data Space
0 - 26-bit Data Space selected
1 - 32-bit Data Space selected
L Bit 6
Late Abort Timing
0 - Early abort mode selected
1 - Late abort mode selected
B Bit 7
Big/Little Endian
0 - Little-endian operation
1 - Big-endian operation
S Bit 8
System
This bit controls the ARM610 permission system.
5.3.3 Register 2 Translation Table Base
Register 2 is a write-only register which holds the base of the currently active Level
One page table.
5.3.4 Register 3 Domain Access Control
Register 3 is a write-only register which holds the current access control for domains
0 to 15. See
·
9.14 Domain Access Control
definitions and other details.
on page 9-14 for the access permission
0
13
14
31
Translation Table Base
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P610ARM-KG 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor
P610ARM-KW 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor
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