參數(shù)資料
型號(hào)： PCD5002AH
廠商： NXP SEMICONDUCTORS
元件分類： 尋呼電路
英文描述： Enhanced Pager Decoder for APOC1/POCSAG
中文描述： TELECOM, PAGING DECODER, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁(yè)數(shù)： 14/48頁(yè)
文件大?。?/td> 252K
代理商： PCD5002AH
1999 Jan 08
14
Philips Semiconductors
Product specification
Enhanced Pager Decoder for
APOC1/POCSAG
PCD5002A
Table 5
Call header format
Table 6
Call header bit identification
Note
1.
The DF bit in the call header is set:
a) When the sync word of the batch in which the (beginning of the) call was received, did not match the standard
POCSAG or a user-programmed sync word. The sync word identifier (bits S3 to S1) will then be made 0.
b) When any code-word of a previous call received in the same batch was uncorrectable.
Table 7
Message data format
Table 8
Message data bit identification
Table 9
Call terminator format
BYTE NUMBER
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
1
2
3
0
0
X
S3
S3
X
S2
S2
F0
S1
S1
F1
R3
R3
E3
R2
R2
E2
R1
R1
E1
DF
0
0
BITS (MSB TO LSB)
IDENTIFICATION
S3 to S1
R3 to R1
DF
F0 and F1
E3 to E1
identifier number of sync word for current batch (7 = standard POCSAG)
identifier number of user address (RIC)
data fail mode indication (1 = data fail mode); note 1
function bits of received address code-word (bits 20 and 21)
detected error type; see Table 11; E3 = 0 in a concatenated call header
BYTE NUMBER
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
1
2
3
M2
M10
M18
M3
M11
M19
M4
M12
M20
M5
M13
M21
M6
M14
E3
M7
M15
E2
M8
M16
E1
M9
M17
M1
BITS (MSB TO LSB)
IDENTIFICATION
M2 to M21
E3 to E1
M1
message code-word data bits
detected error type; see Table 11
message code-word flag
BYTE NUMBER
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
1
2
3
FT
FT
X
S3
S3
X
S2
S2
X
S1
S1
X
0
0
0
0
0
0
DF
X
0
E3
E2
E1
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