參數(shù)資料
型號： PCD5002H
廠商： NXP SEMICONDUCTORS
元件分類： 尋呼電路
英文描述： Advanced POCSAG and APOC-1 Paging Decoder
中文描述： TELECOM, PAGING DECODER, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁數(shù)： 28/48頁
文件大小： 203K
代理商： PCD5002H
1997 Jun 24
28
Philips Semiconductors
Product specification
Advanced POCSAG and APOC-1 Paging
Decoder
PCD5002
Table 23
Special programmed functions (EEPROM address 00H)
Table 24
Special programmed functions (EEPROM address 01H)
Note
1.
Since the exact establishment time is related to the programmed bit rate, Table 25 shows the values for the various
bit rates.
BIT (MSB: D7)
VALUE
DESCRIPTION
D0
0
1
0
1
POCSAG decoding enabled
APOC-1 decoding enabled
cycle length: 5 batches
cycle length: 15 batches
batch number (D1 = 0, MSB is ignored)
batch number (D1 = 1)
continuous data decoding enabled
received data inversion enabled
D1
D5 to D2 (MSB: D5)
0 to 4
0 to 14
1
1
D6
D7
BIT (MSB: D7)
VALUE
DESCRIPTION
D1 and D0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
1
1
5 ms receiver establishment time (nominal); note 1
10 ms
15 ms
30 ms
20 ms oscillator establishment time (nominal); note 1
30 ms
40 ms
50 ms
512 bits/s received bit rate
1024 bits/s (not used in POCSAG)
1200 bits/s
2400 bits/s
synthesizer interface enabled (programming at switch-on)
voltage converter enabled
D3 and D2
D5 and D4
D6
D7
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相關代理商/技術參數(shù)
參數(shù)描述
PCD5002HBD-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication Decoder
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PCD5003A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Pager Decoder for POCSAG
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