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參數(shù)資料
| 型號： | PCI6621 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER |
| 中文描述： | 雙/單插槽CardBus和UltraMedia控制器 |
| 文件頁數(shù)： | 41/204頁 |
| 文件大小： | 860K |
| 代理商： | PCI6621 |
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221
Table 211. 16-Bit PC Card Interface Control Terminals (Continued)
SKT B TERMINAL
SKT A TERMINAL
DESCRIPTION
I/O
TYPE
POWER
RAIL
NAME
NO.
NAME
NO.
A_OE
C12
B_OE
L18
Output enable. OE is driven low by the controller to enable 16-bit memory PC Card
data output during host memory read cycles.
DMA terminal count. OE is used as terminal count (TC) during DMA operations to a
16-bit PC Card that supports DMA. The controller asserts OE to indicate TC for a DMA
write operation.
O
VCCA/
VCCB
A_READY
(IREQ)
C04
B_READY
(IREQ)
B19
Ready. The ready function is provided when the 16-bit PC Card and the host socket are
configured for the memory-only interface. READY is driven low by 16-bit memory PC
Cards to indicate that the memory card circuits are busy processing a previous write
command. READY is driven high when the 16-bit memory PC Card is ready to accept a
new data transfer command.
Interrupt request. IREQ is asserted by a 16-bit I/O PC Card to indicate to the host that a
controller on the 16-bit I/O PC Card requires service by the host software. IREQ is high
(deasserted) when no interrupt is requested.
I
VCCA/
VCCB
A_REG
C05
B_REG
F15
Attribute memory select. REG remains high for all common memory accesses. When
REG is asserted, access is limited to attribute memory (OE or WE active) and to the I/O
space (IORD or IOWR active). Attribute memory is a separately accessed section of
card memory and is generally used to record card capacity and other configuration and
attribute information.
DMA acknowledge. REG is used as a DMA acknowledge (DACK) during DMA
operations to a 16-bit PC Card that supports DMA. The controller asserts REG to
indicate a DMA operation. REG is used in conjunction with the DMA read (IOWR) or
DMA write (IORD) strobes to transfer data.
O
VCCA/
VCCB
A_RESET
A06
B_RESET
F17
PC Card reset. RESET forces a hard reset to a 16-bit PC Card.
O
VCCA/
VCCB
VCCA/
VCCB
VCCA/
VCCB
A_VS1
A_VS2
A03
E08
B_VS1
B_VS2
C18
F19
Voltage sense 1 and voltage sense 2. VS1 and VS2, when used in conjunction with
each other, determine the operating voltage of the PC Card.
I/O
A_WAIT
B03
B_WAIT
B18
Bus cycle wait. WAIT is driven by a 16-bit PC Card to extend the completion of the
memory or I/O cycle in progress.
I
A_WE
B09
B_WE
J15
Write enable. WE is used to strobe memory write data into 16-bit memory PC Cards.
WE is also used for memory PC Cards that employ programmable memory
technologies.
DMA terminal count. WE is used as a TC during DMA operations to a 16-bit PC Card
that supports DMA. The controller asserts WE to indicate the TC for a DMA read
operation.
O
VCCA/
VCCB
A_WP
(IOIS16)
C03
B_WP
(IOIS16)
A18
Write protect. WP applies to 16-bit memory PC Cards. WP reflects the status of the
write-protect switch on 16-bit memory PC Cards. For 16-bit I/O cards, WP is used for
the 16-bit port (IOIS16) function.
I/O is 16 bits. IOIS16 applies to 16-bit I/O PC Cards. IOIS16 is asserted by the 16-bit
PC Card when the address on the bus corresponds to an address to which the 16-bit
PC Card responds, and the I/O port that is addressed is capable of 16-bit accesses.
DMA request. WP can be used as the DMA request signal during DMA operations to a
16-bit PC Card that supports DMA. If used, then the PC Card asserts WP to indicate a
request for a DMA operation.
I
VCCA/
VCCB
These terminals are reserved for the PCI6611 and PCI6411 controllers.
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