參數(shù)資料
型號(hào)： PCI6621
廠商： Texas Instruments, Inc.
英文描述： DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
中文描述： 雙/單插槽CardBus和UltraMedia控制器
文件頁數(shù)： 64/204頁
文件大?。?/td> 860K
代理商： PCI6621
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Table 39. Interrupt Mask and Flag Registers
CARD TYPE
EVENT
MASK
FLAG
16-bit memory
Battery conditions (BVD1, BVD2)
ExCA offset 05h/45h/805h bits 1 and 0
ExCA offset 04h/44h/804h bits 1 and 0
Wait states (READY)
ExCA offset 05h/45h/805h bit 2
ExCA offset 04h/44h/804h bit 2
16-bit I/O
Change in card status (STSCHG)
ExCA offset 05h/45h/805h bit 0
ExCA offset 04h/44h/804h bit 0
16-bit I/O/
UltraMedia
Interrupt request (IREQ)
Always enabled
PCI configuration offset 91h bit 0
All 16-bit PC
Cards/
Smart Card
adapters/
UltraMedia/
Flash Media
Power cycle complete
ExCA offset 05h/45h/805h bit 3
ExCA offset 04h/44h/804h bit 3
Change in card status (CSTSCHG)
Socket mask bit 0
Socket event bit 0
CardBus
Interrupt request (CINT)
Always enabled
PCI configuration offset 91h bit 0
Power cycle complete
Card insertion or removal
Socket mask bit 3
Socket mask bits 2 and 1
Socket event bit 3
Socket event bits 2 and 1
Functional interrupt events are valid only for 16-bit I/O and CardBus cards; that is, the functional interrupts are not
valid for 16-bit memory cards. Furthermore, card insertion and removal-type CSC interrupts are independent of the
card type.
Table 310. PC Card Interrupt Events and Description
CARD TYPE
EVENT
TYPE
SIGNAL
DESCRIPTION
Battery conditions
(BVD1, BVD2)
CSC
BVD1(STSCHG)//CSTSCHG
A transition on BVD1 indicates a change in the
PC Card battery conditions.
16-bit
memory
BVD2(SPKR)//CAUDIO
A transition on BVD2 indicates a change in the
PC Card battery conditions.
Wait states
(READY)
CSC
READY(IREQ)//CINT
A transition on READY indicates a change in the
ability of the memory PC Card to accept or provide
data.
16-bit I/O
Change in card
status (STSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of STSCHG indicates a status change
on the PC Card.
16-bit I/O/
UltraMedia
Interrupt request
(IREQ)
Functional
READY(IREQ)//CINT
The assertion of IREQ indicates an interrupt request
from the PC Card.
CardBus
Change in card
status (CSTSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of CSTSCHG indicates a status
change on the PC Card.
Interrupt request
(CINT)
Functional
READY(IREQ)//CINT
The assertion of CINT indicates an interrupt request
from the PC Card.
All PC Cards/
Smart Card
adapters/
UltraMedia/
Flash Media
Card insertion
or removal
CSC
CD1//CCD1,
CD2//CCD2
A transition on either CD1//CCD1 or CD2//CCD2
indicates an insertion or removal of a 16-bit or
CardBus PC Card.
Power cycle
complete
CSC
N/A
An interrupt is generated when a PC Card power-up
cycle has completed.
The naming convention for PC Card signals describes the function for 16-bit memory, I/O cards, and CardBus. For
example, READY(IREQ)//CINT includes READY for 16-bit memory cards, IREQ for 16-bit I/O cards, and CINT for
CardBus cards. The 16-bit memory card signal name is first, with the I/O card signal name second, enclosed in
parentheses. The CardBus signal name follows after a double slash (//).
The
1997 PC Card Standard
describes the power-up sequence that must be followed by the PCI6x21/PCI6x11
controller when an insertion event occurs and the host requests that the socket V
CC
and V
PP
be powered. Upon
completion of this power-up sequence, the PCI6x21/PCI6x11 interrupt scheme can be used to notify the host system
(see Table 310), denoted by the power cycle complete event. This interrupt source is considered a
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