參數(shù)資料
型號(hào): PCI7610LQFP
廠商: Texas Instruments, Inc.
英文描述: PC Card, UltraMedia, and Integrated 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
中文描述: PC卡,UltraMedia和集成1394 - 2000 OHCI的雙端口的PHY /鏈路層控制器
文件頁數(shù): 62/240頁
文件大?。?/td> 1298K
代理商: PCI7610LQFP
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320
Table 313. PC Card Interrupt Events and Description
CARD TYPE
EVENT
TYPE
SIGNAL
DESCRIPTION
Battery conditions
(BVD1, BVD2)
CSC
BVD1(STSCHG)//CSTSCHG
A transition on BVD1 indicates a change in the
PC Card battery conditions.
16-bit
memory
BVD2(SPKR)//CAUDIO
A transition on BVD2 indicates a change in the
PC Card battery conditions.
Wait states
(READY)
CSC
READY(IREQ)//CINT
A transition on READY indicates a change in the
ability of the memory PC Card to accept or provide
data.
16-bit I/O
Change in card
status (STSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of STSCHG indicates a status change
on the PC Card.
16-bit I/O
Interrupt request
(IREQ)
Functional
READY(IREQ)//CINT
The assertion of IREQ indicates an interrupt request
from the PC Card.
CardBus
Change in card
status (CSTSCHG)
CSC
BVD1(STSCHG)//CSTSCHG
The assertion of CSTSCHG indicates a status
change on the PC Card.
Interrupt request
(CINT)
Functional
READY(IREQ)//CINT
The assertion of CINT indicates an interrupt request
from the PC Card.
All PC Cards/
Smart Card
adapters
Card insertion
or removal
CSC
CD1//CCD1,
CD2//CCD2
A transition on either CD1//CCD1 or CD2//CCD2
indicates an insertion or removal of a 16-bit or
CardBus PC Card.
Power cycle
complete
CSC
N/A
An interrupt is generated when a PC Card power-up
cycle has completed.
The naming convention for PC Card signals describes the function for 16-bit memory, I/O cards, and CardBus. For
example, READY(IREQ)//CINT includes READY for 16-bit memory cards, IREQ for 16-bit I/O cards, and CINT for
CardBus cards. The 16-bit memory card signal name is first, with the I/O card signal name second, enclosed in
parentheses. The CardBus signal name follows after a double slash (//).
The
1997 PC Card Standard
describes the power-up sequence that must be followed by the PCI7610 controller when
an insertion event occurs and the host requests that the socket V
CC
and V
PP
be powered. Upon completion of this
power-up sequence, the PCI7610 interrupt scheme can be used to notify the host system (see Table 313), denoted
by the power cycle complete event. This interrupt source is considered a PCI7610 internal event, because it depends
on the completion of applying power to the socket rather than on a signal change at the PC Card interface.
3.8.2
Interrupt Masks and Flags
Host software may individually mask (or disable) most of the potential interrupt sources listed in Table 313 by setting
the appropriate bits in the PCI7610 controller. By individually masking the interrupt sources listed, software can
control those events that cause a PCI7610 interrupt. Host software has some control over the system interrupt the
PCI7610 controller asserts by programming the appropriate routing registers. The PCI7610 controller allows host
software to route PC Card CSC and PC Card functional interrupts to separate system interrupts. Interrupt routing
somewhat specific to the interrupt signaling method used is discussed in more detail in the following sections.
When an interrupt is signaled by the PCI7610 controller, the interrupt service routine must determine which of the
events listed in Table 312 caused the interrupt. Internal registers in the PCI7610 controller provide flags that report
the source of an interrupt. By reading these status bits, the interrupt service routine can determine the action to be
taken.
Table 312 details the registers and bits associated with masking and reporting potential interrupts. All interrupts can
be masked except the functional PC Card interrupts, and an interrupt status flag is available for all types of interrupts.
Notice that there is not a mask bit to stop the PCI7610 controller from passing PC Card functional interrupts through
to the appropriate interrupt scheme. These interrupts are not valid until the card is properly powered, and there must
never be a card interrupt that does not require service after proper initialization.
Table 312 lists the various methods of clearing the interrupt flag bits. The flag bits in the ExCA registers (16-bit PC
Card-related interrupt flags) can be cleared using two different methods. One method is an explicit write of 1 to the
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