參數(shù)資料
型號(hào): PCM3060PWR
元件分類: Codec
英文描述: 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
中文描述: 24位96/192-kHz異步立體聲音頻編解碼
文件頁數(shù): 26/45頁
文件大小: 394K
代理商: PCM3060PWR
www.ti.com
Timing Requirements
t
(MCH)
1.4 V
1.4 V
1.4 V
MS
t
(MSS)
t
(MCL)
t
(MHH)
t
(MSH)
t
(MCY)
t
(MDH)
t
(MDS)
MC
MD
LSB
T0013-10
TWO-WIRE (I
2
C) SERIAL CONTROL
The PCM3060 supports the I
2
C-compatible serial bus and the data transmission protocol for standard-mode and
fast-mode (C
B
max = 100 pF) as a slave device. This protocol is explained in the well-known I
2
C 2.0
specification.
Slave Address
MSB
PCM3060
SLAS533–MARCH 2007
Figure 30
shows a detailed timing diagram for the 3-wire serial control interface. These timing parameters are
critical for proper control port operation.
SYMBOL
t
(MCY)
t
w(MCL)
t
w (MCH)
t
(MHH)
t
(MSS)
t
(MSH)
t
(MDH)
t
(MDS)
PARAMETER
MIN
100
40
40
t
(MCY)
15
15
15
15
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
MC cycle time
MC low-level time
MC high-level time
MS high-level time
MS falling edge to MC rising edge
MS rising edge from MC rising edge for LSB
(1)
MD hold time
MD setup time
(1)
MC rise edge for LSB to MS rise edge.
Figure 30. Control Interface Timing for SPI
LSB
1
0
0
0
1
1
ADR
R/W
26
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