參數(shù)資料
型號(hào)： PCM3060PWR
元件分類(lèi)： Codec
英文描述： 24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
中文描述： 24位96/192-kHz異步立體聲音頻編解碼
文件頁(yè)數(shù)： 29/45頁(yè)
文件大?。?/td> 394K
代理商： PCM3060PWR
www.ti.com
MODE CONTROL REGISTERS
The PCM3060 has many user-programmable functions which are accessed via control registers, and they are
programmed through the SPI or I
2
C serial control port.
Table 3
lists the available mode control functions along
with reset default conditions and associated register addresses. The register map is shown in
Table 3
.
PCM3060
SLAS533–MARCH 2007
Table 3. User-Programmable Mode Control Functions
FUNCTION RESET
DEFAULT
Normal operation
Normal operation
Power save
Power save
Differential
REGISTER
64
64
64
64
64
LABEL
MRST
SRST
ADPSV
DAPSV
S/E
Mode control register reset (ADC and DAC)
System reset (ADC and DAC)
ADC power-save control (ADC)
DAC power-save control (DAC)
VOUT configuration control (DAC)
Digital attenuation control, 0 dB to –100 dB in 0.5-dB steps
(DAC)
Clock select for DAC operation (DAC)
Master/slave mode for DAC audio interface (DAC)
Interface format for DAC audio interface (DAC)
Oversampling rate control (DAC)
Output phase select (DAC)
Soft-mute control (DAC)
Digital filter rolloff control (DAC)
De-emphasis sampling rate selection (DAC)
De-emphasis function control (DAC)
Zero-flag polarity control (DAC)
Zero-flag form select (DAC)
Digital attenuation control, 20 dB to –100 dB in 0.5-dB steps
(ADC)
Clock select for ADC operation (ADC)
Master/slave mode for ADC audio interface (ADC)
Interface format for ADC audio interface (ADC)
Zero-cross detection disable for digital attenuation control (ADC)
HPF bypass control (ADC)
Input phase select (ADC)
Soft-mute control (ADC)
0 dB, no attenuation
65 and 66
AT21[7:0], AT22[7:0]
CLK2 enable
Slave
I
2
S
Low (x64/x32/x16)
Normal
Mute disabled
Sharp rolloff
44.1 kHz
De-emphasis disabled
High for detection
L-ch, R-ch independent
67
67
67
68
68
68
69
69
69
69
69
CSEL2
M/S 2[2:0]
FMT2[1:0]
OVER
DREV2
MUT22, MUT21
FLT
DMF[1:0]
DMC
ZREV
AZRO
0 dB, no attenuation
70 and 71
AT11[7:0], AT12[7:0]
CLK1 enable
Slave
I
2
S
72
72
72
73
73
73
73
CSEL1
M/S1[2:0]
FMT1[1:0]
ZCDD
BYP
DREV1
MUT12, MUT11
Zero-cross detection enabled
Bypass disabled
Normal
Mute disabled
Table 4. Register Map
REGISTER ADDRESS
DATA
HEX
DEC
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
40h
Register 64
0
1
0
0
0
0
0
0
MRST
SRST
ADPSV
DAPSV
RSV
(1)
S/E
RSV
(1)
RSV
(1)
41h
Register 65
0
1
0
0
0
0
0
1
AT217
AT216
AT215
AT214
AT213
AT212
AT211
AT210
42h
Register 66
0
1
0
0
0
0
1
0
AT227
AT226
AT225
AT224
AT223
AT222
AT221
AT220
43h
Register 67
0
1
0
0
0
0
1
1
CSEL2
M/S 22
M/S 21
M/S 20
FMT21
FMT20
RSV
(1)
RSV
(1)
44h
Register 68
0
1
0
0
0
1
0
0
OVER
DREV2
MUT22
MUT21
RSV
(1)
RSV
(1)
RSV
(1)
RSV
(1)
45h
Register 69
0
1
0
0
0
1
0
1
FLT
DMF1
DMF0
DMC
ZREV
AZRO
RSV
(1)
RSV
(1)
46h
Register 70
0
1
0
0
0
1
1
0
AT117
AT116
AT115
AT114
AT113
AT112
AT111
AT110
47h
Register 71
0
1
0
0
0
1
1
1
AT127
AT126
AT125
AT124
AT123
AT122
AT121
AT120
48h
Register 72
0
1
0
0
1
0
0
0
CSEL1
M/S 12
M/S 11
M/S 10
FMT11
FMT10
RSV
(1)
RSV
(1)
49h
Register 73
0
1
0
0
1
0
0
1
ZCDD
BYP
DREV1
MUT12
MUT11
RSV
(1)
RSV
(1)
RSV
(1)
(1)
RSV means reserved for factory use or future extension, and these bits should be set to 0 during regular operation. Do not write any
values in addresses other than those listed.
29
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PCM3060PWRG4 功能描述:接口—CODEC 24bit 96/192kHz Asynch St Aud Codec RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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